Lines Matching refs:BITS_WITH_WMASK
77 BITS_WITH_WMASK(0, CLK_GATE_MASK,
85 BITS_WITH_WMASK(0, CLK_GATE_MASK,
93 BITS_WITH_WMASK(0, CLK_GATE_MASK,
101 BITS_WITH_WMASK(0, CLK_GATE_MASK,
109 BITS_WITH_WMASK(0, CLK_GATE_MASK,
127 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK,
132 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK,
137 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK,
142 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK,
148 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK,
229 BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2));
233 BITS_WITH_WMASK(pull, GPIO_P_MASK, id * 2));
326 BITS_WITH_WMASK(0, 0x07, PCLK_GPIO2_GATE_SHIFT));
382 BITS_WITH_WMASK(0, 0x07, PCLK_GPIO2_GATE_SHIFT));
