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43   Registers the PCI device specified by Address so all the PCI configuration

101 Reads and returns the 8-bit PCI configuration register specified by Address.
126 Writes the 8-bit PCI configuration register specified by Address with the
127 value specified by Value. Value is returned. This function must guarantee
154 Reads the 8-bit PCI configuration register specified by Address, performs a
155 bitwise OR between the read result and the value specified by
157 specified by Address. The value written to the PCI configuration register is
185 Reads the 8-bit PCI configuration register specified by Address, performs a
186 bitwise AND between the read result and the value specified by AndData, and
187 writes the result to the 8-bit PCI configuration register specified by
216 Reads the 8-bit PCI configuration register specified by Address, performs a
217 bitwise AND between the read result and the value specified by AndData,
219 the value specified by OrData, and writes the result to the 8-bit PCI
220 configuration register specified by Address. The value written to the PCI
254 specified by the StartBit and the EndBit. The value of the bit field is
291 field is specified by the StartBit and the EndBit. All other bits in the
299 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
333 Reads the 8-bit PCI configuration register specified by Address, performs a
334 bitwise OR between the read result and the value specified by
336 specified by Address. The value written to the PCI configuration register is
344 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
378 Reads the 8-bit PCI configuration register specified by Address, performs a
379 bitwise AND between the read result and the value specified by AndData, and
380 writes the result to the 8-bit PCI configuration register specified by
389 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
424 Reads the 8-bit PCI configuration register specified by Address, performs a
426 the value specified by AndData, and writes the result to the 8-bit PCI
427 configuration register specified by Address. The value written to the PCI
436 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
437 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
473 Reads and returns the 16-bit PCI configuration register specified by Address.
499 Writes the 16-bit PCI configuration register specified by Address with the
500 value specified by Value. Value is returned. This function must guarantee
528 Reads the 16-bit PCI configuration register specified by Address, performs a
529 bitwise OR between the read result and the value specified by
531 specified by Address. The value written to the PCI configuration register is
560 Reads the 16-bit PCI configuration register specified by Address, performs a
561 bitwise AND between the read result and the value specified by AndData, and
562 writes the result to the 16-bit PCI configuration register specified by
592 Reads the 16-bit PCI configuration register specified by Address, performs a
593 bitwise AND between the read result and the value specified by AndData,
595 the value specified by OrData, and writes the result to the 16-bit PCI
596 configuration register specified by Address. The value written to the PCI
631 specified by the StartBit and the EndBit. The value of the bit field is
669 field is specified by the StartBit and the EndBit. All other bits in the
678 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
712 Reads the 16-bit PCI configuration register specified by Address, performs a
713 bitwise OR between the read result and the value specified by
715 specified by Address. The value written to the PCI configuration register is
724 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
758 Reads the 16-bit PCI configuration register specified by Address, performs a
759 bitwise AND between the read result and the value specified by AndData, and
760 writes the result to the 16-bit PCI configuration register specified by
770 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
805 Reads the 16-bit PCI configuration register specified by Address, performs a
807 the value specified by AndData, and writes the result to the 16-bit PCI
808 configuration register specified by Address. The value written to the PCI
818 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
819 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
855 Reads and returns the 32-bit PCI configuration register specified by Address.
881 Writes the 32-bit PCI configuration register specified by Address with the
882 value specified by Value. Value is returned. This function must guarantee
910 Reads the 32-bit PCI configuration register specified by Address, performs a
911 bitwise OR between the read result and the value specified by
913 specified by Address. The value written to the PCI configuration register is
942 Reads the 32-bit PCI configuration register specified by Address, performs a
943 specified by AndData, and
944 writes the result to the 32-bit PCI configuration register specified by
974 Reads the 32-bit PCI configuration register specified by Address, performs a
975 bitwise AND between the read result and the value specified by AndData,
977 the value specified by OrData, and writes the result to the 32-bit PCI
978 configuration register specified by Address. The value written to the PCI
1013 specified by the StartBit and the EndBit. The value of the bit field is
1051 field is specified by the StartBit and the EndBit. All other bits in the
1060 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1094 Reads the 32-bit PCI configuration register specified by Address, performs a
1095 bitwise OR between the read result and the value specified by
1097 specified by Address. The value written to the PCI configuration register is
1106 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1140 Reads the 32-bit PCI configuration register specified by Address, performs a
1141 bitwise AND between the read result and the value specified by AndData, and
1142 writes the result to the 32-bit PCI configuration register specified by
1152 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1187 Reads the 32-bit PCI configuration register specified by Address, performs a
1189 the value specified by AndData, and writes the result to the 32-bit PCI
1190 configuration register specified by Address. The value written to the PCI
1200 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1201 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1237 Reads the range of PCI configuration registers specified by StartAddress and
1238 Size into the buffer specified by Buffer. This function only allows the PCI
1334 Copies the data in a caller supplied buffer to a specified range of PCI
1337 Writes the range of PCI configuration registers specified by StartAddress and
1338 Size from the buffer specified by Buffer. This function only allows the PCI