Lines Matching refs:Address
46 Invalidates the instruction cache lines specified by Address and Length. If
47 Address is not aligned on a cache line boundary, then entire instruction
48 cache line containing Address is invalidated. If Address + Length is not
50 containing Address + Length -1 is invalidated. This function may choose to
53 lines are invalidated. Address is returned.
55 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
57 @param Address The base address of the instruction cache lines to
59 Address is a physical address. If the CPU is in a virtual
60 addressing mode, then Address is a virtual address.
64 @return Address
70 IN VOID *Address,
74 return AsmFlushCacheRange (Address, Length);
100 Writes Back and Invalidate the data cache lines specified by Address and
101 Length. If Address is not aligned on a cache line boundary, then entire data
102 cache line containing Address is written back and invalidated. If Address +
104 line containing Address + Length -1 is written back and invalidated. This
108 invalidated. Address is returned.
110 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
112 @param Address The base address of the data cache lines to write back and
114 Address is a physical address. If the CPU is in a virtual
115 addressing mode, then Address is a virtual address.
119 @return Address
125 IN VOID *Address,
129 ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
131 return AsmFlushCacheRange (Address, Length);
157 Writes Back the data cache lines specified by Address and Length. If Address
159 containing Address is written back. If Address + Length is not aligned on a
160 cache line boundary, then the entire data cache line containing Address +
165 coherency domain of the calling CPU. Address is returned.
167 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
169 @param Address The base address of the data cache lines to write back. If
170 the CPU is in a physical addressing mode, then Address is a
171 physical address. If the CPU is in a virtual addressing
172 mode, then Address is a virtual address.
175 @return Address
181 IN VOID *Address,
185 ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
187 return AsmFlushCacheRange (Address, Length);
214 Invalidates the data cache lines specified by Address and Length. If Address
216 containing Address is invalidated. If Address + Length is not aligned on a
217 cache line boundary, then the entire data cache line containing Address +
220 invalidated. Address is returned. This function must be used with care
226 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
228 @param Address The base address of the data cache lines to invalidate. If
229 the CPU is in a physical addressing mode, then Address is a
230 physical address. If the CPU is in a virtual addressing mode,
231 then Address is a virtual address.
234 @return Address
240 IN VOID *Address,
244 return AsmFlushCacheRange (Address, Length);
