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26 /// ACPI 6.0 Generic Address Space definition

91 // No definition needed as it is a common description table header, the same with
102 // No definition needed as it is a common description table header, the same with
276 // no definition needed as they are common description table header, the same with
277 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
283 /// Multiple APIC Description Table header definition. The rest of the table
330 /// Processor Local APIC Structure Definition
370 /// Platform Interrupt Sources Structure Definition
473 /// Processor Local x2APIC Structure Definition
649 /// Processor Local APIC/SAPIC Affinity Structure Definition
668 /// Memory Affinity Structure Definition
692 /// Processor Local x2APIC Affinity Structure Definition
706 /// GICC Affinity Structure Definition
755 /// Corrected Platform Error Polling Processor Structure Definition
782 /// Maximum Proximity Domain Information Structure Definition
794 /// ACPI RAS Feature Table definition.
807 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
853 /// Memory Power State Table definition.
869 /// MPST Platform Communication Channel Shared Memory Region definition.
948 /// Memory Topology Table definition.
1017 /// Boot Graphics Resource Table definition.
1256 /// Firmware Performance Record Table definition.
1263 /// Generic Timer Description Table definition.
1360 // NVDIMM Firmware Interface Table definition.
1373 // Definition for NFIT Table Structure Types
1384 // Definition for NFIT Structure Header
1392 // Definition for System Physical Address Range Structure
1418 // Definition for Memory Device to System Physical Address Range Mapping Structure
1453 // Definition for Interleave Structure
1466 // Definition for SMBIOS Management Information Structure
1476 // Definition for NVDIMM Control Region Structure
1503 // Definition for NVDIMM Block Data Window Region Structure
1517 // Definition for Flush Hint Address Structure
1543 /// Boot Error Region Block Status Definition
1555 /// Boot Error Region Definition
1574 /// Generic Error Data Entry Definition
1623 /// IA-32 Architecture Machine Check Exception Structure Definition
1640 /// IA-32 Architecture Machine Check Bank Structure Definition
1674 /// Hardware Error Notification Configuration Write Enable Structure Definition
1687 /// Hardware Error Notification Structure Definition
1702 /// IA-32 Architecture Corrected Machine Check Structure Definition
1718 /// IA-32 Architecture NMI Error Structure Definition
1730 /// PCI Express Root Port AER Structure Definition
1753 /// PCI Express Device AER Structure Definition
1775 /// PCI Express Bridge AER Structure Definition
1800 /// Generic Hardware Error Source Structure Definition
1817 /// Generic Error Status Definition
1949 /// EINJ Error Type Definition