Lines Matching refs:UINT8
78 UINT8 NotUsed:1; // Not used [0:0]
79 UINT8 Crc:7; // CRC [7:1]
80 UINT8 ManufacturingDate; // Manufacturing date [15:8]
81 UINT8 ProductSerialNumber[4]; // Product serial number [47:16]
82 UINT8 ProductRevision; // Product revision [55:48]
83 UINT8 ProductName[6]; // Product name [103:56]
84 UINT8 OemId; // OEM/Application ID [111:104]
85 UINT8 DeviceType:2; // Device/BGA [113:112]
86 UINT8 Reserved:6; // Reserved [119:114]
87 UINT8 ManufacturerId; // Manufacturer ID [127:120]
138 UINT8 Reserved[16]; // Reserved [15:0]
139 UINT8 SecureRemovalType; // Secure Removal Type R/W & R [16]
140 UINT8 ProductStateAwarenessEnablement; // Product state awareness enablement R/W/E & R [17]
141 UINT8 MaxPreLoadingDataSize[4]; // Max pre loading data size R [21:18]
142 UINT8 PreLoadingDataSize[4]; // Pre loading data size R/W/EP [25:22]
143 UINT8 FfuStatus; // FFU status R [26]
144 UINT8 Reserved1[2]; // Reserved [28:27]
145 UINT8 ModeOperationCodes; // Mode operation codes W/EP [29]
146 UINT8 ModeConfig; // Mode config R/W/EP [30]
147 UINT8 Reserved2; // Reserved [31]
148 UINT8 FlushCache; // Flushing of the cache W/EP [32]
149 UINT8 CacheCtrl; // Control to turn the Cache ON/OFF R/W/EP [33]
150 UINT8 PowerOffNotification; // Power Off Notification R/W/EP [34]
151 UINT8 PackedFailureIndex; // Packed command failure index R [35]
152 UINT8 PackedCommandStatus; // Packed command status R [36]
153 UINT8 ContextConf[15]; // Context configuration R/W/EP [51:37]
154 UINT8 ExtPartitionsAttribute[2]; // Extended Partitions Attribute R/W [53:52]
155 UINT8 ExceptionEventsStatus[2]; // Exception events status R [55:54]
156 UINT8 ExceptionEventsCtrl[2]; // Exception events control R/W/EP [57:56]
157 UINT8 DyncapNeeded; // Number of addressed group to be Released R [58]
158 UINT8 Class6Ctrl; // Class 6 commands control R/W/EP [59]
159 UINT8 IniTimeoutEmu; // 1st initialization after disabling sector size emulation R [60]
160 UINT8 DataSectorSize; // Sector size R [61]
161 UINT8 UseNativeSector; // Sector size emulation R/W [62]
162 UINT8 NativeSectorSize; // Native sector size R [63]
163 UINT8 VendorSpecificField[64]; // Vendor Specific Fields <vendor specific> [127:64]
164 UINT8 Reserved3[2]; // Reserved [129:128]
165 UINT8 ProgramCidCsdDdrSupport; // Program CID/CSD in DDR mode support R [130]
166 UINT8 PeriodicWakeup; // Periodic Wake-up R/W/E [131]
167 UINT8 TcaseSupport; // Package Case Temperature is controlled W/EP [132]
168 UINT8 ProductionStateAwareness; // Production state awareness R/W/E [133]
169 UINT8 SecBadBlkMgmnt; // Bad Block Management mode R/W [134]
170 UINT8 Reserved4; // Reserved [135]
171 UINT8 EnhStartAddr[4]; // Enhanced User Data Start Address R/W [139:136]
172 UINT8 EnhSizeMult[3]; // Enhanced User Data Area Size R/W [142:140]
173 UINT8 GpSizeMult[12]; // General Purpose Partition Size R/W [154:143]
174 UINT8 PartitionSettingCompleted; // Partitioning Setting R/W [155]
175 UINT8 PartitionsAttribute; // Partitions attribute R/W [156]
176 UINT8 MaxEnhSizeMult[3]; // Max Enhanced Area Size R [159:157]
177 UINT8 PartitioningSupport; // Partitioning Support R [160]
178 UINT8 HpiMgmt; // HPI management R/W/EP [161]
179 UINT8 RstFunction; // H/W reset function R/W [162]
180 UINT8 BkopsEn; // Enable background operations handshake R/W [163]
181 UINT8 BkopsStart; // Manually start background operations W/EP [164]
182 UINT8 SanitizeStart; // Start Sanitize operation W/EP [165]
183 UINT8 WrRelParam; // Write reliability parameter register R [166]
184 UINT8 WrRelSet; // Write reliability setting register R/W [167]
185 UINT8 RpmbSizeMult; // RPMB Size R [168]
186 UINT8 FwConfig; // FW configuration R/W [169]
187 UINT8 Reserved5; // Reserved [170]
188 UINT8 UserWp; // User area write protection register R/W,R/W/CP&R/W/EP [171]
189 UINT8 Reserved6; // Reserved [172]
190 UINT8 BootWp; // Boot area write protection register R/W&R/W/CP[173]
191 UINT8 BootWpStatus; // Boot write protection status registers R [174]
192 UINT8 EraseGroupDef; // High-density erase group definition R/W/EP [175]
193 UINT8 Reserved7; // Reserved [176]
194 UINT8 BootBusConditions; // Boot bus Conditions R/W/E [177]
195 UINT8 BootConfigProt; // Boot config protection R/W&R/W/CP[178]
196 UINT8 PartitionConfig; // Partition configuration R/W/E&R/W/EP[179]
197 UINT8 Reserved8; // Reserved [180]
198 UINT8 ErasedMemCont; // Erased memory content R [181]
199 UINT8 Reserved9; // Reserved [182]
200 UINT8 BusWidth; // Bus width mode W/EP [183]
201 UINT8 Reserved10; // Reserved [184]
202 UINT8 HsTiming; // High-speed interface timing R/W/EP [185]
203 UINT8 Reserved11; // Reserved [186]
204 UINT8 PowerClass; // Power class R/W/EP [187]
205 UINT8 Reserved12; // Reserved [188]
206 UINT8 CmdSetRev; // Command set revision R [189]
207 UINT8 Reserved13; // Reserved [190]
208 UINT8 CmdSet; // Command set R/W/EP [191]
212 UINT8 ExtCsdRev; // Extended CSD revision [192]
213 UINT8 Reserved14; // Reserved [193]
214 UINT8 CsdStructure; // CSD STRUCTURE [194]
215 UINT8 Reserved15; // Reserved [195]
216 UINT8 DeviceType; // Device type [196]
217 UINT8 DriverStrength; // I/O Driver Strength [197]
218 UINT8 OutOfInterruptTime; // Out-of-interrupt busy timing[198]
219 UINT8 PartitionSwitchTime; // Partition switching timing [199]
220 UINT8 PwrCl52M195V; // Power class for 52MHz at 1.95V [200]
221 UINT8 PwrCl26M195V; // Power class for 26MHz at 1.95V [201]
222 UINT8 PwrCl52M360V; // Power class for 52MHz at 3.6V [202]
223 UINT8 PwrCl26M360V; // Power class for 26MHz at 3.6V [203]
224 UINT8 Reserved16; // Reserved [204]
225 UINT8 MinPerfR4B26M; // Minimum Read Performance for 4bit at 26MHz [205]
226 UINT8 MinPerfW4B26M; // Minimum Write Performance for 4bit at 26MHz [206]
227 UINT8 MinPerfR8B26M4B52M; // Minimum Read Performance for 8bit at 26MHz, for 4bit at 52MHz [207]
228 UINT8 MinPerfW8B26M4B52M; // Minimum Write Performance for 8bit at 26MHz, for 4bit at 52MHz [208]
229 UINT8 MinPerfR8B52M; // Minimum Read Performance for 8bit at 52MHz [209]
230 UINT8 MinPerfW8B52M; // Minimum Write Performance for 8bit at 52MHz [210]
231 UINT8 Reserved17; // Reserved [211]
232 UINT8 SecCount[4]; // Sector Count [215:212]
233 UINT8 SleepNotificationTime; // Sleep Notification Timout [216]
234 UINT8 SATimeout; // Sleep/awake timeout [217]
235 UINT8 ProductionStateAwarenessTimeout; // Production state awareness timeout [218]
236 UINT8 SCVccq; // Sleep current (VCCQ) [219]
237 UINT8 SCVcc; // Sleep current (VCC) [220]
238 UINT8 HcWpGrpSize; // High-capacity write protect group size [221]
239 UINT8 RelWrSecC; // Reliable write sector count [222]
240 UINT8 EraseTimeoutMult; // High-capacity erase timeout [223]
241 UINT8 HcEraseGrpSize; // High-capacity erase unit size [224]
242 UINT8 AccSize; // Access size [225]
243 UINT8 BootSizeMult; // Boot partition size [226]
244 UINT8 Reserved18; // Reserved [227]
245 UINT8 BootInfo; // Boot information [228]
246 UINT8 SecTrimMult; // Secure TRIM Multiplier [229]
247 UINT8 SecEraseMult; // Secure Erase Multiplier [230]
248 UINT8 SecFeatureSupport; // Secure Feature support [231]
249 UINT8 TrimMult; // TRIM Multiplier [232]
250 UINT8 Reserved19; // Reserved [233]
251 UINT8 MinPerfDdrR8b52M; // Minimum Read Performance for 8bit at 52MHz in DDR mode [234]
252 UINT8 MinPerfDdrW8b52M; // Minimum Write Performance for 8bit at 52MHz in DDR mode [235]
253 UINT8 PwrCl200M130V; // Power class for 200MHz, at VCCQ=1.3V, VCC = 3.6V [236]
254 UINT8 PwrCl200M195V; // Power class for 200MHz at VCCQ=1.95V, VCC = 3.6V [237]
255 UINT8 PwrClDdr52M195V; // Power class for 52MHz, DDR at VCC= 1.95V [238]
256 UINT8 PwrClDdr52M360V; // Power class for 52MHz, DDR at VCC= 3.6V [239]
257 UINT8 Reserved20; // Reserved [240]
258 UINT8 IniTimeoutAp; // 1st initialization time after partitioning [241]
259 UINT8 CorrectlyPrgSectorsNum[4]; // Number of correctly programmed sectors [245:242]
260 UINT8 BkopsStatus; // Background operations status [246]
261 UINT8 PowerOffLongTime; // Power off notification(long) timeout [247]
262 UINT8 GenericCmd6Time; // Generic CMD6 timeout [248]
263 UINT8 CacheSize[4]; // Cache size [252:249]
264 UINT8 PwrClDdr200M360V; // Power class for 200MHz, DDR at VCC= 3.6V [253]
265 UINT8 FirmwareVersion[8]; // Firmware version [261:254]
266 UINT8 DeviceVersion[2]; // Device version [263:262]
267 UINT8 OptimalTrimUnitSize; // Optimal trim unit size[264]
268 UINT8 OptimalWriteSize; // Optimal write size [265]
269 UINT8 OptimalReadSize; // Optimal read size [266]
270 UINT8 PreEolInfo; // Pre EOL information [267]
271 UINT8 DeviceLifeTimeEstTypA; // Device life time estimation type A [268]
272 UINT8 DeviceLifeTimeEstTypB; // Device life time estimation type B [269]
273 UINT8 VendorProprietaryHealthReport[32]; // Vendor proprietary health report [301:270]
274 UINT8 NumOfFwSectorsProgrammed[4]; // Number of FW sectors correctly programmed [305:302]
275 UINT8 Reserved21[181]; // Reserved [486:306]
276 UINT8 FfuArg[4]; // FFU Argument [490:487]
277 UINT8 OperationCodeTimeout; // Operation codes timeout [491]
278 UINT8 FfuFeatures; // FFU features [492]
279 UINT8 SupportedModes; // Supported modes [493]
280 UINT8 ExtSupport; // Extended partitions attribute support [494]
281 UINT8 LargeUnitSizeM1; // Large Unit size [495]
282 UINT8 ContextCapabilities; // Context management capabilities [496]
283 UINT8 TagResSize; // Tag Resources Size [497]
284 UINT8 TagUnitSize; // Tag Unit Size [498]
285 UINT8 DataTagSupport; // Data Tag Support [499]
286 UINT8 MaxPackedWrites; // Max packed write commands [500]
287 UINT8 MaxPackedReads; // Max packed read commands[501]
288 UINT8 BkOpsSupport; // Background operations support [502]
289 UINT8 HpiFeatures; // HPI features [503]
290 UINT8 SupportedCmdSet; // Supported Command Sets [504]
291 UINT8 ExtSecurityErr; // Extended Security Commands Error [505]
292 UINT8 Reserved22[6]; // Reserved [511:506]
