Lines Matching full:specified
46 Registers the PCI device specified by Address so all the PCI configuration registers
50 If the register specified by Address >= 0x100, then ASSERT().
73 Reads and returns the 8-bit PCI configuration register specified by Address.
78 If the register specified by Address >= 0x100, then ASSERT().
95 Writes the 8-bit PCI configuration register specified by Address with the
96 value specified by Value. Value is returned. This function must guarantee
100 If the register specified by Address >= 0x100, then ASSERT().
120 Reads the 8-bit PCI configuration register specified by Address, performs a
121 bitwise OR between the read result and the value specified by
123 specified by Address. The value written to the PCI configuration register is
128 If the register specified by Address >= 0x100, then ASSERT().
148 Reads the 8-bit PCI configuration register specified by Address, performs a
149 bitwise AND between the read result and the value specified by AndData, and
150 writes the result to the 8-bit PCI configuration register specified by
156 If the register specified by Address >= 0x100, then ASSERT().
176 Reads the 8-bit PCI configuration register specified by Address, performs a
177 bitwise AND between the read result and the value specified by AndData,
179 the value specified by OrData, and writes the result to the 8-bit PCI
180 configuration register specified by Address. The value written to the PCI
185 If the register specified by Address >= 0x100, then ASSERT().
207 specified by the StartBit and the EndBit. The value of the bit field is
211 If the register specified by Address >= 0x100, then ASSERT().
237 field is specified by the StartBit and the EndBit. All other bits in the
242 If the register specified by Address >= 0x100, then ASSERT().
246 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
271 Reads the 8-bit PCI configuration register specified by Address, performs a
272 bitwise OR between the read result and the value specified by
274 specified by Address. The value written to the PCI configuration register is
279 If the register specified by Address >= 0x100, then ASSERT().
283 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
308 Reads the 8-bit PCI configuration register specified by Address, performs a
309 bitwise AND between the read result and the value specified by AndData, and
310 writes the result to the 8-bit PCI configuration register specified by
316 If the register specified by Address >= 0x100, then ASSERT().
320 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
346 Reads the 8-bit PCI configuration register specified by Address, performs a
348 the value specified by AndData, and writes the result to the 8-bit PCI
349 configuration register specified by Address. The value written to the PCI
355 If the register specified by Address >= 0x100, then ASSERT().
359 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
360 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
386 Reads and returns the 16-bit PCI configuration register specified by Address.
392 If the register specified by Address >= 0x100, then ASSERT().
409 Writes the 16-bit PCI configuration register specified by Address with the
410 value specified by Value. Value is returned. This function must guarantee
415 If the register specified by Address >= 0x100, then ASSERT().
435 specified by Address, performs a
436 bitwise OR between the read result and the value specified by
438 specified by Address. The value written to the PCI configuration register is
444 If the register specified by Address >= 0x100, then ASSERT().
464 Reads the 16-bit PCI configuration register specified by Address, performs a
465 bitwise AND between the read result and the value specified by AndData, and
466 writes the result to the 16-bit PCI configuration register specified by
473 If the register specified by Address >= 0x100, then ASSERT().
493 Reads the 16-bit PCI configuration register specified by Address, performs a
494 bitwise AND between the read result and the value specified by AndData,
496 the value specified by OrData, and writes the result to the 16-bit PCI
497 configuration register specified by Address. The value written to the PCI
503 If the register specified by Address >= 0x100, then ASSERT().
525 specified by the StartBit and the EndBit. The value of the bit field is
530 If the register specified by Address >= 0x100, then ASSERT().
556 field is specified by the StartBit and the EndBit. All other bits in the
562 If the register specified by Address >= 0x100, then ASSERT().
566 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
591 Reads the 16-bit PCI configuration register specified by Address, performs a
592 bitwise OR between the read result and the value specified by
594 specified by Address. The value written to the PCI configuration register is
600 If the register specified by Address >= 0x100, then ASSERT().
604 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
629 Reads the 16-bit PCI configuration register specified by Address, performs a
630 bitwise AND between the read result and the value specified by AndData, and
631 writes the result to the 16-bit PCI configuration register specified by
638 If the register specified by Address >= 0x100, then ASSERT().
642 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
668 Reads the 16-bit PCI configuration register specified by Address, performs a
670 the value specified by AndData, and writes the result to the 16-bit PCI
671 configuration register specified by Address. The value written to the PCI
678 If the register specified by Address >= 0x100, then ASSERT().
682 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
683 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
709 Reads and returns the 32-bit PCI configuration register specified by Address.
715 If the register specified by Address >= 0x100, then ASSERT().
732 Writes the 32-bit PCI configuration register specified by Address with the
733 value specified by Value. Value is returned. This function must guarantee
738 If the register specified by Address >= 0x100, then ASSERT().
758 Reads the 32-bit PCI configuration register specified by Address, performs a
759 bitwise OR between the read result and the value specified by
761 specified by Address. The value written to the PCI configuration register is
767 If the register specified by Address >= 0x100, then ASSERT().
787 Reads the 32-bit PCI configuration register specified by Address, performs a
788 bitwise AND between the read result and the value specified by AndData, and
789 writes the result to the 32-bit PCI configuration register specified by
796 If the register specified by Address >= 0x100, then ASSERT().
816 Reads the 32-bit PCI configuration register specified by Address, performs a
817 bitwise AND between the read result and the value specified by AndData,
819 the value specified by OrData, and writes the result to the 32-bit PCI
820 configuration register specified by Address. The value written to the PCI
826 If the register specified by Address >= 0x100, then ASSERT().
848 specified by the StartBit and the EndBit. The value of the bit field is
853 If the register specified by Address >= 0x100, then ASSERT().
879 field is specified by the StartBit and the EndBit. All other bits in the
885 If the register specified by Address >= 0x100, then ASSERT().
889 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
914 Reads the 32-bit PCI configuration register specified by Address, performs a
915 bitwise OR between the read result and the value specified by
917 specified by Address. The value written to the PCI configuration register is
923 If the register specified by Address >= 0x100, then ASSERT().
927 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
952 Reads the 32-bit PCI configuration register specified by Address, performs a
953 bitwise AND between the read result and the value specified by AndData, and
954 writes the result to the 32-bit PCI configuration register specified by
961 If the register specified by Address >= 0x100, then ASSERT().
965 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
991 Reads the 32-bit PCI configuration register specified by Address, performs a
993 the value specified by AndData, and writes the result to the 32-bit PCI
994 configuration register specified by Address. The value written to the PCI
1001 If the register specified by Address >= 0x100, then ASSERT().
1005 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1006 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1032 Reads the range of PCI configuration registers specified by StartAddress and
1033 Size into the buffer specified by Buffer. This function only allows the PCI
1041 If the register specified by StartAddress >= 0x100, then ASSERT().
1062 Copies the data in a caller supplied buffer to a specified range of PCI
1065 Writes the range of PCI configuration registers specified by StartAddress and
1066 Size from the buffer specified by Buffer. This function only allows the PCI
1074 If the register specified by StartAddress >= 0x100, then ASSERT().
