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100   Reads and returns the 8-bit PCI configuration register specified by Address.

107 @return The 8-bit PCI configuration register specified by Address.
119 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
140 Reads the 8-bit PCI configuration register specified by Address,
141 performs a bitwise OR between the read result and the value specified by OrData,
142 and writes the result to the 8-bit PCI configuration register specified by Address.
164 Reads the 8-bit PCI configuration register specified by Address,
165 performs a bitwise AND between the read result and the value specified by AndData,
166 and writes the result to the 8-bit PCI configuration register specified by Address.
188 Reads the 8-bit PCI configuration register specified by Address,
189 performs a bitwise AND between the read result and the value specified by AndData,
190 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
191 and writes the result to the 8-bit PCI configuration register specified by Address.
216 specified by the StartBit and the EndBit. The value of the bit field is
245 field is specified by the StartBit and the EndBit. All other bits in the
253 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
278 Reads the 8-bit PCI configuration register specified by Address, performs a
279 bitwise OR between the read result and the value specified by
281 specified by Address. The value written to the PCI configuration register is
289 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
314 Reads the 8-bit PCI configuration register specified by Address, performs a
315 bitwise AND between the read result and the value specified by AndData, and
316 writes the result to the 8-bit PCI configuration register specified by
325 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
351 Reads the 8-bit PCI configuration register specified by Address, performs a
353 the value specified by AndData, and writes the result to the 8-bit PCI
354 configuration register specified by Address. The value written to the PCI
363 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
364 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
390 Reads and returns the 16-bit PCI configuration register specified by Address.
398 @return The 16-bit PCI configuration register specified by Address.
410 specified by Address with the value specified by Value.
433 Reads the 16-bit PCI configuration register specified by Address, performs a
434 bitwise OR between the read result and the value specified by
436 specified by Address. The value written to the PCI configuration register is
460 Reads the 16-bit PCI configuration register specified by Address,
461 performs a bitwise AND between the read result and the value specified by AndData,
462 and writes the result to the 16-bit PCI configuration register specified by Address.
486 Reads the 16-bit PCI configuration register specified by Address,
487 performs a bitwise AND between the read result and the value specified by AndData,
488 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
489 and writes the result to the 16-bit PCI configuration register specified by Address.
515 specified by the StartBit and the EndBit. The value of the bit field is
545 field is specified by the StartBit and the EndBit. All other bits in the
554 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
576 Reads the 16-bit PCI configuration register specified by Address,
577 performs a bitwise OR between the read result and the value specified by OrData,
578 and writes the result to the 16-bit PCI configuration register specified by Address.
585 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
610 Reads the 16-bit PCI configuration register specified by Address,
611 performs a bitwise OR between the read result and the value specified by OrData,
612 and writes the result to the 16-bit PCI configuration register specified by Address.
622 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
648 Reads the 16-bit PCI configuration register specified by Address, performs a
650 the value specified by AndData, and writes the result to the 16-bit PCI
651 configuration register specified by Address. The value written to the PCI
660 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
661 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
687 Reads and returns the 32-bit PCI configuration register specified by Address.
695 @return The 32-bit PCI configuration register specified by Address.
707 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
729 Reads the 32-bit PCI configuration register specified by Address,
730 performs a bitwise OR between the read result and the value specified by OrData,
731 and writes the result to the 32-bit PCI configuration register specified by Address.
754 Reads the 32-bit PCI configuration register specified by Address,
755 performs a bitwise AND between the read result and the value specified by AndData,
756 and writes the result to the 32-bit PCI configuration register specified by Address.
780 Reads the 32-bit PCI configuration register specified by Address,
781 performs a bitwise AND between the read result and the value specified by AndData,
782 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
783 and writes the result to the 32-bit PCI configuration register specified by Address.
809 specified by the StartBit and the EndBit. The value of the bit field is
839 field is specified by the StartBit and the EndBit. All other bits in the
848 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
873 Reads the 32-bit PCI configuration register specified by Address, performs a
874 bitwise OR between the read result and the value specified by
876 specified by Address. The value written to the PCI configuration register is
884 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
910 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
911 AND between the read result and the value specified by AndData, and writes the result
912 to the 32-bit PCI configuration register specified by Address. The value written to
920 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
946 Reads the 32-bit PCI configuration register specified by Address, performs a
948 the value specified by AndData, and writes the result to the 32-bit PCI
949 configuration register specified by Address. The value written to the PCI
958 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
959 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
985 Reads the range of PCI configuration registers specified by StartAddress and
986 Size into the buffer specified by Buffer. This function only allows the PCI
1014 Copies the data in a caller supplied buffer to a specified range of PCI
1017 Writes the range of PCI configuration registers specified by StartAddress and
1018 Size from the buffer specified by Buffer. This function only allows the PCI