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40   Reads and returns the 8-bit PCI configuration register specified by Address, 

63   Writes the 8-bit PCI configuration register specified by Address with the

64   value specified by Value. Value is returned. This function must guarantee

87   Reads the 8-bit PCI configuration register specified by Address, performs a

88   bitwise OR between the read result and the value specified by

90   specified by Address. The value written to the PCI configuration register is

114   Reads the 8-bit PCI configuration register specified by Address, performs a

115   bitwise AND between the read result and the value specified by AndData, and

116   writes the result to the 8-bit PCI configuration register specified by

142   Reads the 8-bit PCI configuration register specified by Address, performs a

143   bitwise AND between the read result and the value specified by AndData,

145   the value specified by OrData, and writes the result to the 8-bit PCI

146   configuration register specified by Address. The value written to the PCI

173   specified by the StartBit and the EndBit. The value of the bit field is

203   field is specified by the StartBit and the EndBit. All other bits in the

211   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

237   Reads the 8-bit PCI configuration register specified by Address, performs a

238   bitwise OR between the read result and the value specified by

240   specified by Address. The value written to the PCI configuration register is

248   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

274   Reads the 8-bit PCI configuration register specified by Address, performs a

275   bitwise AND between the read result and the value specified by AndData, and

276   writes the result to the 8-bit PCI configuration register specified by

285   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

311   Reads the 8-bit PCI configuration register specified by Address, performs a

313   the value specified by AndData, and writes the result to the 8-bit PCI

314   configuration register specified by Address. The value written to the PCI

323   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

324   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

351   Reads and returns the 16-bit PCI configuration register specified by Address.

374   Writes the 16-bit PCI configuration register specified by Address with the

375   value specified by Value. Value is returned. This function must guarantee

399   Reads the 16-bit PCI configuration register specified by Address, performs a

400   bitwise OR between the read result and the value specified by

402   specified by Address. The value written to the PCI configuration register is

427   Reads the 16-bit PCI configuration register specified by Address, performs a

428   bitwise AND between the read result and the value specified by AndData, and

429   writes the result to the 16-bit PCI configuration register specified by

456   Reads the 16-bit PCI configuration register specified by Address, performs a

457   bitwise AND between the read result and the value specified by AndData,

459   the value specified by OrData, and writes the result to the 16-bit PCI

460   configuration register specified by Address. The value written to the PCI

488   specified by the StartBit and the EndBit. The value of the bit field is

519   field is specified by the StartBit and the EndBit. All other bits in the

528   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

554   Reads the 16-bit PCI configuration register specified by Address, performs a

555   bitwise OR between the read result and the value specified by

557   specified by Address. The value written to the PCI configuration register is

566   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

592   Reads the 16-bit PCI configuration register specified by Address, performs a

593   bitwise AND between the read result and the value specified by AndData, and

594   writes the result to the 16-bit PCI configuration register specified by

604   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

630   Reads the 16-bit PCI configuration register specified by Address, performs a

632   the value specified by AndData, and writes the result to the 16-bit PCI

633   configuration register specified by Address. The value written to the PCI

643   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

644   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

671   Reads and returns the 32-bit PCI configuration register specified by Address.

694   Writes the 32-bit PCI configuration register specified by Address with the

695   value specified by Value. Value is returned. This function must guarantee

719   Reads the 32-bit PCI configuration register specified by Address, performs a

720   bitwise OR between the read result and the value specified by

722   specified by Address. The value written to the PCI configuration register is

747   Reads the 32-bit PCI configuration register specified by Address, performs a

748   bitwise AND between the read result and the value specified by AndData, and

749   writes the result to the 32-bit PCI configuration register specified by

776   Reads the 32-bit PCI configuration register specified by Address, performs a

777   bitwise AND between the read result and the value specified by AndData,

779   the value specified by OrData, and writes the result to the 32-bit PCI

780   configuration register specified by Address. The value written to the PCI

808   specified by the StartBit and the EndBit. The value of the bit field is

839   field is specified by the StartBit and the EndBit. All other bits in the

848   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

874 specified by Address, performs a

875   bitwise OR between the read result and the value specified by

877   specified by Address. The value written to the PCI configuration register is

886   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

912   Reads the 32-bit PCI configuration register specified by Address, performs a

913   bitwise AND between the read result and the value specified by AndData, and

914   writes the result to the 32-bit PCI configuration register specified by

924   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

950   Reads the 32-bit PCI configuration register specified by Address, performs a

952   the value specified by AndData, and writes the result to the 32-bit PCI

953   configuration register specified by Address. The value written to the PCI

963   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

964   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

991   Reads the range of PCI configuration registers specified by StartAddress and

992   Size into the buffer specified by Buffer. This function only allows the PCI

1020   Copies the data in a caller supplied buffer to a specified range of PCI

1024   Writes the range of PCI configuration registers specified by StartAddress and

1025   Size from the buffer specified by Buffer. This function only allows the PCI