Lines Matching defs:Read
36 Read a Super I/O register.
46 (TRUE) after completing the read operation. The driver must
51 and the register to read (bits 7:0). The logical device
57 @retval EFI_TIMEOUT The register could not be read in the a reasonable
84 (TRUE) after completing the read operation. The driver must
89 and the register to read (bits 7:0). The logical device
95 @retval EFI_TIMEOUT The register could not be read in the a reasonable
117 the Register is read, its content is bitwise ANDed with AndMask, and then ORed
158 /// This PPI provides low-level access to Super I/O registers using Read() and
167 EFI_PEI_SIO_REGISTER_READ Read;
