Lines Matching full:specified
67 Registers the PCI device specified by Address so all the PCI configuration registers
71 If the register specified by Address >= 0x100, then ASSERT().
98 Reads and returns the 8-bit PCI configuration register specified by Address.
103 If the register specified by Address >= 0x100, then ASSERT().
134 Writes the 8-bit PCI configuration register specified by Address with the
135 value specified by Value. Value is returned. This function must guarantee
139 If the register specified by Address >= 0x100, then ASSERT().
176 Reads the 8-bit PCI configuration register specified by Address, performs a
177 bitwise OR between the read result and the value specified by
179 specified by Address. The value written to the PCI configuration register is
184 If the register specified by Address >= 0x100, then ASSERT().
221 Reads the 8-bit PCI configuration register specified by Address, performs a
222 bitwise AND between the read result and the value specified by AndData, and
223 writes the result to the 8-bit PCI configuration register specified by
229 If the register specified by Address >= 0x100, then ASSERT().
266 Reads the 8-bit PCI configuration register specified by Address, performs a
267 bitwise AND between the read result and the value specified by AndData,
269 the value specified by OrData, and writes the result to the 8-bit PCI
270 configuration register specified by Address. The value written to the PCI
275 If the register specified by Address >= 0x100, then ASSERT().
315 specified by the StartBit and the EndBit. The value of the bit field is
319 If the register specified by Address >= 0x100, then ASSERT().
363 field is specified by the StartBit and the EndBit. All other bits in the
368 If the register specified by Address >= 0x100, then ASSERT().
372 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
416 Reads the 8-bit PCI configuration register specified by Address, performs a
417 bitwise OR between the read result and the value specified by
419 specified by Address. The value written to the PCI configuration register is
424 If the register specified by Address >= 0x100, then ASSERT().
428 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
472 Reads the 8-bit PCI configuration register specified by Address, performs a
473 bitwise AND between the read result and the value specified by AndData, and
474 writes the result to the 8-bit PCI configuration register specified by
480 If the register specified by Address >= 0x100, then ASSERT().
484 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
529 Reads the 8-bit PCI configuration register specified by Address, performs a
531 the value specified by AndData, and writes the result to the 8-bit PCI
532 configuration register specified by Address. The value written to the PCI
538 If the register specified by Address >= 0x100, then ASSERT().
542 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
543 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
589 Reads and returns the 16-bit PCI configuration register specified by Address.
595 If the register specified by Address >= 0x100, then ASSERT().
626 Writes the 16-bit PCI configuration register specified by Address with the
627 value specified by Value. Value is returned. This function must guarantee
632 If the register specified by Address >= 0x100, then ASSERT().
669 Reads the 16-bit PCI configuration register specified by Address, performs a
670 bitwise OR between the read result and the value specified by
672 specified by Address. The value written to the PCI configuration register is
678 If the register specified by Address >= 0x100, then ASSERT().
715 Reads the 16-bit PCI configuration register specified by Address, performs a
716 bitwise AND between the read result and the value specified by AndData, and
717 writes the result to the 16-bit PCI configuration register specified by
724 If the register specified by Address >= 0x100, then ASSERT().
761 Reads the 16-bit PCI configuration register specified by Address, performs a
762 bitwise AND between the read result and the value specified by AndData,
764 the value specified by OrData, and writes the result to the 16-bit PCI
765 configuration register specified by Address. The value written to the PCI
771 If the register specified by Address >= 0x100, then ASSERT().
811 specified by the StartBit and the EndBit. The value of the bit field is
816 If the register specified by Address >= 0x100, then ASSERT().
860 field is specified by the StartBit and the EndBit. All other bits in the
866 If the register specified by Address >= 0x100, then ASSERT().
870 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
914 Reads the 16-bit PCI configuration register specified by Address, performs a
915 bitwise OR between the read result and the value specified by
917 specified by Address. The value written to the PCI configuration register is
923 If the register specified by Address >= 0x100, then ASSERT().
927 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
971 Reads the 16-bit PCI configuration register specified by Address, performs a
972 bitwise AND between the read result and the value specified by AndData, and
973 writes the result to the 16-bit PCI configuration register specified by
980 If the register specified by Address >= 0x100, then ASSERT().
984 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1029 Reads the 16-bit PCI configuration register specified by Address, performs a
1031 the value specified by AndData, and writes the result to the 16-bit PCI
1032 configuration register specified by Address. The value written to the PCI
1039 If the register specified by Address >= 0x100, then ASSERT().
1043 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1044 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1090 Reads and returns the 32-bit PCI configuration register specified by Address.
1096 If the register specified by Address >= 0x100, then ASSERT().
1127 Writes the 32-bit PCI configuration register specified by Address with the
1128 value specified by Value. Value is returned. This function must guarantee
1133 If the register specified by Address >= 0x100, then ASSERT().
1170 Reads the 32-bit PCI configuration register specified by Address, performs a
1171 bitwise OR between the read result and the value specified by
1173 specified by Address. The value written to the PCI configuration register is
1179 If the register specified by Address >= 0x100, then ASSERT().
1216 Reads the 32-bit PCI configuration register specified by Address, performs a
1217 bitwise AND between the read result and the value specified by AndData, and
1218 writes the result to the 32-bit PCI configuration register specified by
1225 If the register specified by Address >= 0x100, then ASSERT().
1262 Reads the 32-bit PCI configuration register specified by Address, performs a
1263 bitwise AND between the read result and the value specified by AndData,
1265 the value specified by OrData, and writes the result to the 32-bit PCI
1266 configuration register specified by Address. The value written to the PCI
1272 If the register specified by Address >= 0x100, then ASSERT().
1312 specified by the StartBit and the EndBit. The value of the bit field is
1317 If the register specified by Address >= 0x100, then ASSERT().
1361 field is specified by the StartBit and the EndBit. All other bits in the
1367 If the register specified by Address >= 0x100, then ASSERT().
1371 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1415 Reads the 32-bit PCI configuration register specified by Address, performs a
1416 bitwise OR between the read result and the value specified by
1418 specified by Address. The value written to the PCI configuration register is
1424 If the register specified by Address >= 0x100, then ASSERT().
1428 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1472 Reads the 32-bit PCI configuration register specified by Address, performs a
1473 bitwise AND between the read result and the value specified by AndData, and
1474 writes the result to the 32-bit PCI configuration register specified by
1481 If the register specified by Address >= 0x100, then ASSERT().
1485 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1530 Reads the 32-bit PCI configuration register specified by Address, performs a
1532 the value specified by AndData, and writes the result to the 32-bit PCI
1533 configuration register specified by Address. The value written to the PCI
1540 If the register specified by Address >= 0x100, then ASSERT().
1544 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1545 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1591 Reads the range of PCI configuration registers specified by StartAddress and
1592 Size into the buffer specified by Buffer. This function only allows the PCI
1600 If the register specified by StartAddress >= 0x100, then ASSERT().
1688 Copies the data in a caller supplied buffer to a specified range of PCI
1691 Writes the range of PCI configuration registers specified by StartAddress and
1692 Size from the buffer specified by Buffer. This function only allows the PCI
1700 If the register specified by StartAddress >= 0x100, then ASSERT().
