Lines Matching full:specified
73 Reads and returns the 8-bit PCI configuration register specified by Address.
80 @return The 8-bit PCI configuration register specified by Address.
97 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
123 Reads the 8-bit PCI configuration register specified by Address,
124 performs a bitwise OR between the read result and the value specified by OrData,
125 and writes the result to the 8-bit PCI configuration register specified by Address.
150 Reads the 8-bit PCI configuration register specified by Address,
151 performs a bitwise AND between the read result and the value specified by AndData,
152 and writes the result to the 8-bit PCI configuration register specified by Address.
177 Reads the 8-bit PCI configuration register specified by Address,
178 performs a bitwise AND between the read result and the value specified by AndData,
179 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
180 and writes the result to the 8-bit PCI configuration register specified by Address.
208 specified by the StartBit and the EndBit. The value of the bit field is
240 field is specified by the StartBit and the EndBit. All other bits in the
248 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
279 Reads the 8-bit PCI configuration register specified by Address, performs a
280 bitwise OR between the read result and the value specified by
282 specified by Address. The value written to the PCI configuration register is
290 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
321 Reads the 8-bit PCI configuration register specified by Address, performs a
322 bitwise AND between the read result and the value specified by AndData, and
323 writes the result to the 8-bit PCI configuration register specified by
332 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
364 Reads the 8-bit PCI configuration register specified by Address, performs a
366 the value specified by AndData, and writes the result to the 8-bit PCI
367 configuration register specified by Address. The value written to the PCI
376 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
377 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
409 Reads and returns the 16-bit PCI configuration register specified by Address.
417 @return The 16-bit PCI configuration register specified by Address.
434 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
462 Reads the 16-bit PCI configuration register specified by Address, performs a
463 bitwise OR between the read result and the value specified by
465 specified by Address. The value written to the PCI configuration register is
492 Reads the 16-bit PCI configuration register specified by Address,
493 performs a bitwise AND between the read result and the value specified by AndData,
494 and writes the result to the 16-bit PCI configuration register specified by Address.
521 Reads the 16-bit PCI configuration register specified by Address,
522 performs a bitwise AND between the read result and the value specified by AndData,
523 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
524 and writes the result to the 16-bit PCI configuration register specified by Address.
553 specified by the StartBit and the EndBit. The value of the bit field is
586 field is specified by the StartBit and the EndBit. All other bits in the
595 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
623 Reads the 16-bit PCI configuration register specified by Address,
624 performs a bitwise OR between the read result and the value specified by OrData,
625 and writes the result to the 16-bit PCI configuration register specified by Address.
632 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
663 Reads the 16-bit PCI configuration register specified by Address,
664 performs a bitwise OR between the read result and the value specified by OrData,
665 and writes the result to the 16-bit PCI configuration register specified by Address.
675 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
707 Reads the 16-bit PCI configuration register specified by Address, performs a
709 the value specified by AndData, and writes the result to the 16-bit PCI
710 configuration register specified by Address. The value written to the PCI
719 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
720 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
752 Reads and returns the 32-bit PCI configuration register specified by Address.
760 @return The 32-bit PCI configuration register specified by Address.
777 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
804 Reads the 32-bit PCI configuration register specified by Address,
805 performs a bitwise OR between the read result and the value specified by OrData,
806 and writes the result to the 32-bit PCI configuration register specified by Address.
832 Reads the 32-bit PCI configuration register specified by Address,
833 performs a bitwise AND between the read result and the value specified by AndData,
834 and writes the result to the 32-bit PCI configuration register specified by Address.
861 Reads the 32-bit PCI configuration register specified by Address,
862 performs a bitwise AND between the read result and the value specified by AndData,
863 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
864 and writes the result to the 32-bit PCI configuration register specified by Address.
893 specified by the StartBit and the EndBit. The value of the bit field is
926 field is specified by the StartBit and the EndBit. All other bits in the
935 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
966 Reads the 32-bit PCI configuration register specified by Address, performs a
967 bitwise OR between the read result and the value specified by
969 specified by Address. The value written to the PCI configuration register is
977 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1009 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
1010 AND between the read result and the value specified by AndData, and writes the result
1011 to the 32-bit PCI configuration register specified by Address. The value written to
1019 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1051 Reads the 32-bit PCI configuration register specified by Address, performs a
1053 the value specified by AndData, and writes the result to the 32-bit PCI
1054 configuration register specified by Address. The value written to the PCI
1063 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1064 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1096 Reads the range of PCI configuration registers specified by StartAddress and
1097 Size into the buffer specified by Buffer. This function only allows the PCI
1191 Copies the data in a caller supplied buffer to a specified range of PCI
1194 Writes the range of PCI configuration registers specified by StartAddress and
1195 Size from the buffer specified by Buffer. This function only allows the PCI
