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92   Reads and returns the 8-bit PCI configuration register specified by Address.

117 Writes the 8-bit PCI configuration register specified by Address with the
118 value specified by Value. Value is returned. This function must guarantee
144 Reads the 8-bit PCI configuration register specified by Address, performs a
145 bitwise OR between the read result and the value specified by
147 specified by Address. The value written to the PCI configuration register is
174 Reads the 8-bit PCI configuration register specified by Address, performs a
175 bitwise AND between the read result and the value specified by AndData, and
176 writes the result to the 8-bit PCI configuration register specified by
205 Reads the 8-bit PCI configuration register specified by Address, performs a
206 bitwise AND between the read result and the value specified by AndData,
208 the value specified by OrData, and writes the result to the 8-bit PCI
209 configuration register specified by Address. The value written to the PCI
239 specified by the StartBit and the EndBit. The value of the bit field is
272 field is specified by the StartBit and the EndBit. All other bits in the
280 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
309 Reads the 8-bit PCI configuration register specified by Address, performs a
310 bitwise OR between the read result and the value specified by
312 specified by Address. The value written to the PCI configuration register is
320 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
349 Reads the 8-bit PCI configuration register specified by Address, performs a
350 bitwise AND between the read result and the value specified by AndData, and
351 writes the result to the 8-bit PCI configuration register specified by
360 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
389 Reads the 8-bit PCI configuration register specified by Address, performs a
391 the value specified by AndData, and writes the result to the 8-bit PCI
392 configuration register specified by Address. The value written to the PCI
401 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
402 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
458 specified by Address.
484 Writes the 16-bit PCI configuration register specified by Address with the
485 value specified by Value. Value is returned. This function must guarantee
512 Reads the 16-bit PCI configuration register specified by Address, performs a
513 bitwise OR between the read result and the value specified by
515 specified by Address. The value written to the PCI configuration register is
543 Reads the 16-bit PCI configuration register specified by Address, performs a
544 bitwise AND between the read result and the value specified by AndData, and
545 writes the result to the 16-bit PCI configuration register specified by
575 Reads the 16-bit PCI configuration register specified by Address, performs a
576 bitwise AND between the read result and the value specified by AndData,
578 the value specified by OrData, and writes the result to the 16-bit PCI
579 configuration register specified by Address. The value written to the PCI
610 specified by the StartBit and the EndBit. The value of the bit field is
644 field is specified by the StartBit and the EndBit. All other bits in the
653 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
682 Reads the 16-bit PCI configuration register specified by Address, performs a
683 bitwise OR between the read result and the value specified by
685 specified by Address. The value written to the PCI configuration register is
694 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
723 Reads the 16-bit PCI configuration register specified by Address, performs a
724 bitwise AND between the read result and the value specified by AndData, and
725 writes the result to the 16-bit PCI configuration register specified by
735 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
764 Reads the 16-bit PCI configuration register specified by Address, performs a
766 the value specified by AndData, and writes the result to the 16-bit PCI
767 configuration register specified by Address. The value written to the PCI
777 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
778 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
834 Reads and returns the 32-bit PCI configuration register specified by Address.
860 Writes the 32-bit PCI configuration register specified by Address with the
861 value specified by Value. Value is returned. This function must guarantee
888 Reads the 32-bit PCI configuration register specified by Address, performs a
889 bitwise OR between the read result and the value specified by
891 specified by Address. The value written to the PCI configuration register is
919 Reads the 32-bit PCI configuration register specified by Address, performs a
920 bitwise AND between the read result and the value specified by AndData, and
921 writes the result to the 32-bit PCI configuration register specified by
951 Reads the 32-bit PCI configuration register specified by Address, performs a
952 bitwise AND between the read result and the value specified by AndData,
954 the value specified by OrData, and writes the result to the 32-bit PCI
955 configuration register specified by Address. The value written to the PCI
986 specified by the StartBit and the EndBit. The value of the bit field is
1020 field is specified by the StartBit and the EndBit. All other bits in the
1029 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1058 Reads the 32-bit PCI configuration register specified by Address, performs a
1059 bitwise OR between the read result and the value specified by
1061 specified by Address. The value written to the PCI configuration register is
1070 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1099 Reads the 32-bit PCI configuration register specified by Address, performs a
1100 bitwise AND between the read result and the value specified by AndData, and
1101 writes the result to the 32-bit PCI configuration register specified by
1111 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1140 Reads the 32-bit PCI configuration register specified by Address, performs a
1142 the value specified by AndData, and writes the result to the 32-bit PCI
1143 configuration register specified by Address. The value written to the PCI
1153 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1154 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1184 Reads the range of PCI configuration registers specified by StartAddress and
1185 Size into the buffer specified by Buffer. This function only allows the PCI
1226 Copies the data in a caller supplied buffer to a specified range of PCI
1230 Writes the range of PCI configuration registers specified by StartAddress and
1231 Size from the buffer specified by Buffer. This function only allows the PCI