Lines Matching full:specified
51 It reads and returns the PCI configuration register specified by Address,
52 the width of data is specified by Width.
92 It writes the PCI configuration register specified by Address with the
93 value specified by Data. The width of data is specified by Width.
135 Registers the PCI device specified by Address so all the PCI configuration registers
165 Reads and returns the 8-bit PCI configuration register specified by Address.
191 Writes the 8-bit PCI configuration register specified by Address with the
192 value specified by Value. Value is returned. This function must guarantee
220 Reads the 8-bit PCI configuration register specified by Address, performs a
221 bitwise OR between the read result and the value specified by
223 specified by Address. The value written to the PCI configuration register is
250 Reads the 8-bit PCI configuration register specified by Address, performs a
251 bitwise AND between the read result and the value specified by AndData, and
252 writes the result to the 8-bit PCI configuration register specified by
280 Reads the 8-bit PCI configuration register specified by Address, performs a
281 bitwise AND between the read result and the value specified by AndData,
283 the value specified by OrData, and writes the result to the 8-bit PCI
284 configuration register specified by Address. The value written to the PCI
313 specified by the StartBit and the EndBit. The value of the bit field is
345 field is specified by the StartBit and the EndBit. All other bits in the
353 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
384 Reads the 8-bit PCI configuration register specified by Address, performs a
385 bitwise OR between the read result and the value specified by
387 specified by Address. The value written to the PCI configuration register is
395 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
426 Reads the 8-bit PCI configuration register specified by Address, performs a
427 bitwise AND between the read result and the value specified by AndData, and
428 writes the result to the 8-bit PCI configuration register specified by
437 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
469 Reads the 8-bit PCI configuration register specified by Address, performs a
471 the value specified by AndData, and writes the result to the 8-bit PCI
472 configuration register specified by Address. The value written to the PCI
481 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
482 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
514 Reads and returns the 16-bit PCI configuration register specified by Address.
541 Writes the 16-bit PCI configuration register specified by Address with the
542 value specified by Value. Value is returned. This function must guarantee
571 Reads the 16-bit PCI configuration register specified by Address, performs a
572 bitwise OR between the read result and the value specified by
574 specified by Address. The value written to the PCI configuration register is
602 Reads the 16-bit PCI configuration register specified by Address, performs a
603 bitwise AND between the read result and the value specified by AndData, and
604 writes the result to the 16-bit PCI configuration register specified by
633 Reads the 16-bit PCI configuration register specified by Address, performs a
634 bitwise AND between the read result and the value specified by AndData,
636 the value specified by OrData, and writes the result to the 16-bit PCI
637 configuration register specified by Address. The value written to the PCI
667 specified by the StartBit and the EndBit. The value of the bit field is
700 field is specified by the StartBit and the EndBit. All other bits in the
709 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
740 Reads the 16-bit PCI configuration register specified by Address, performs a
741 bitwise OR between the read result and the value specified by
743 specified by Address. The value written to the PCI configuration register is
752 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
783 Reads the 16-bit PCI configuration register specified by Address, performs a
784 bitwise AND between the read result and the value specified by AndData, and
785 writes the result to the 16-bit PCI configuration register specified by
795 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
827 Reads the 16-bit PCI configuration register specified by Address, performs a
829 the value specified by AndData, and writes the result to the 16-bit PCI
830 configuration register specified by Address. The value written to the PCI
840 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
841 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
873 Reads and returns the 32-bit PCI configuration register specified by Address.
900 Writes the 32-bit PCI configuration register specified by Address with the
901 value specified by Value. Value is returned. This function must guarantee
930 Reads the 32-bit PCI configuration register specified by Address, performs a
931 bitwise OR between the read result and the value specified by
933 specified by Address. The value written to the PCI configuration register is
961 Reads the 32-bit PCI configuration register specified by Address, performs a
962 bitwise AND between the read result and the value specified by AndData, and
963 writes the result to the 32-bit PCI configuration register specified by
992 Reads the 32-bit PCI configuration register specified by Address, performs a
993 bitwise AND between the read result and the value specified by AndData,
995 the value specified by OrData, and writes the result to the 32-bit PCI
996 configuration register specified by Address. The value written to the PCI
1026 specified by the StartBit and the EndBit. The value of the bit field is
1059 field is specified by the StartBit and the EndBit. All other bits in the
1068 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1099 Reads the 32-bit PCI configuration register specified by Address, performs a
1100 bitwise OR between the read result and the value specified by
1102 specified by Address. The value written to the PCI configuration register is
1111 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1142 Reads the 32-bit PCI configuration register specified by Address, performs a
1143 bitwise AND between the read result and the value specified by AndData, and
1144 writes the result to the 32-bit PCI configuration register specified by
1154 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1186 Reads the 32-bit PCI configuration register specified by Address, performs a
1188 the value specified by AndData, and writes the result to the 32-bit PCI
1189 configuration register specified by Address. The value written to the PCI
1199 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1200 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1232 Reads the range of PCI configuration registers specified by StartAddress and
1233 Size into the buffer specified by Buffer. This function only allows the PCI
1327 Copies the data in a caller supplied buffer to a specified range of PCI
1330 Writes the range of PCI configuration registers specified by StartAddress and
1331 Size from the buffer specified by Buffer. This function only allows the PCI
