Lines Matching full:specified
93 It reads and returns the PCI configuration register specified by Address,
94 the width of data is specified by Width.
130 It writes the PCI configuration register specified by Address with the
131 value specified by Data. The width of data is specifed by Width.
196 Reads and returns the 8-bit PCI configuration register specified by Address.
204 @return The 8-bit PCI configuration register specified by Address.
221 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
247 Reads the 8-bit PCI configuration register specified by Address,
248 performs a bitwise OR between the read result and the value specified by OrData,
249 and writes the result to the 8-bit PCI configuration register specified by Address.
274 Reads the 8-bit PCI configuration register specified by Address,
275 performs a bitwise AND between the read result and the value specified by AndData,
276 and writes the result to the 8-bit PCI configuration register specified by Address.
301 Reads the 8-bit PCI configuration register specified by Address,
302 performs a bitwise AND between the read result and the value specified by AndData,
303 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
304 and writes the result to the 8-bit PCI configuration register specified by Address.
332 specified by the StartBit and the EndBit. The value of the bit field is
364 field is specified by the StartBit and the EndBit. All other bits in the
372 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
403 Reads the 8-bit PCI configuration register specified by Address, performs a
404 bitwise OR between the read result and the value specified by
406 specified by Address. The value written to the PCI configuration register is
414 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
445 Reads the 8-bit PCI configuration register specified by Address, performs a
446 bitwise AND between the read result and the value specified by AndData, and
447 writes the result to the 8-bit PCI configuration register specified by
456 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
488 Reads the 8-bit PCI configuration register specified by Address, performs a
490 the value specified by AndData, and writes the result to the 8-bit PCI
491 configuration register specified by Address. The value written to the PCI
500 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
501 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
533 Reads and returns the 16-bit PCI configuration register specified by Address.
541 @return The 16-bit PCI configuration register specified by Address.
558 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
586 Reads the 16-bit PCI configuration register specified by Address, performs a
587 bitwise OR between the read result and the value specified by
589 specified by Address. The value written to the PCI configuration register is
616 Reads the 16-bit PCI configuration register specified by Address,
617 performs a bitwise AND between the read result and the value specified by AndData,
618 and writes the result to the 16-bit PCI configuration register specified by Address.
645 Reads the 16-bit PCI configuration register specified by Address,
646 performs a bitwise AND between the read result and the value specified by AndData,
647 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
648 and writes the result to the 16-bit PCI configuration register specified by Address.
677 specified by the StartBit and the EndBit. The value of the bit field is
710 field is specified by the StartBit and the EndBit. All other bits in the
719 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
747 Reads the 16-bit PCI configuration register specified by Address,
748 performs a bitwise OR between the read result and the value specified by OrData,
749 and writes the result to the 16-bit PCI configuration register specified by Address.
756 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
787 Reads the 16-bit PCI configuration register specified by Address,
788 performs a bitwise OR between the read result and the value specified by OrData,
789 and writes the result to the 16-bit PCI configuration register specified by Address.
799 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
831 Reads the 16-bit PCI configuration register specified by Address, performs a
833 the value specified by AndData, and writes the result to the 16-bit PCI
834 configuration register specified by Address. The value written to the PCI
843 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
844 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
876 Reads and returns the 32-bit PCI configuration register specified by Address.
885 @return The 32-bit PCI configuration register specified by Address.
902 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
930 Reads the 32-bit PCI configuration register specified by Address,
931 performs a bitwise OR between the read result and the value specified by OrData,
932 and writes the result to the 32-bit PCI configuration register specified by Address.
958 Reads the 32-bit PCI configuration register specified by Address,
959 performs a bitwise AND between the read result and the value specified by AndData,
960 and writes the result to the 32-bit PCI configuration register specified by Address.
988 Reads the 32-bit PCI configuration register specified by Address,
989 performs a bitwise AND between the read result and the value specified by AndData,
990 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
991 and writes the result to the 32-bit PCI configuration register specified by Address.
1021 specified by the StartBit and the EndBit. The value of the bit field is
1054 field is specified by the StartBit and the EndBit. All other bits in the
1063 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1094 Reads the 32-bit PCI configuration register specified by Address, performs a
1095 bitwise OR between the read result and the value specified by
1097 specified by Address. The value written to the PCI configuration register is
1105 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1137 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
1138 AND between the read result and the value specified by AndData, and writes the result
1139 to the 32-bit PCI configuration register specified by Address. The value written to
1147 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1179 Reads the 32-bit PCI configuration register specified by Address, performs a
1181 the value specified by AndData, and writes the result to the 32-bit PCI
1182 configuration register specified by Address. The value written to the PCI
1191 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1192 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1224 Reads the range of PCI configuration registers specified by StartAddress and
1225 Size into the buffer specified by Buffer. This function only allows the PCI
1320 Copies the data in a caller supplied buffer to a specified range of PCI
1323 Writes the range of PCI configuration registers specified by StartAddress and
1324 Size from the buffer specified by Buffer. This function only allows the PCI
