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70  Registers the PCI device specified by Address so all the PCI configuration

125 Reads and returns the 8-bit PCI configuration register specified by Address.
149 Writes the 8-bit PCI configuration register specified by Address with the
150 value specified by Value. Value is returned. This function must guarantee
176 Reads the 8-bit PCI configuration register specified by Address, performs a
177 bitwise OR between the read result and the value specified by
179 specified by Address. The value written to the PCI configuration register is
206 Reads the 8-bit PCI configuration register specified by Address, performs a
207 bitwise AND between the read result and the value specified by AndData, and
208 writes the result to the 8-bit PCI configuration register specified by
236 Reads the 8-bit PCI configuration register specified by Address, performs a
237 bitwise AND between the read result and the value specified by AndData,
239 the value specified by OrData, and writes the result to the 8-bit PCI
240 configuration register specified by Address. The value written to the PCI
273 specified by the StartBit and the EndBit. The value of the bit field is
309 field is specified by the StartBit and the EndBit. All other bits in the
317 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
350 Reads the 8-bit PCI configuration register specified by Address, performs a
351 bitwise OR between the read result and the value specified by
353 specified by Address. The value written to the PCI configuration register is
361 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
394 Reads the 8-bit PCI configuration register specified by Address, performs a
395 bitwise AND between the read result and the value specified by AndData, and
396 writes the result to the 8-bit PCI configuration register specified by
405 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
439 Reads the 8-bit PCI configuration register specified by Address, performs a
441 the value specified by AndData, and writes the result to the 8-bit PCI
442 configuration register specified by Address. The value written to the PCI
451 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
452 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
487 Reads and returns the 16-bit PCI configuration register specified by Address.
512 Writes the 16-bit PCI configuration register specified by Address with the
513 value specified by Value. Value is returned. This function must guarantee
540 Reads the 16-bit PCI configuration register specified by Address, performs a
541 bitwise OR between the read result and the value specified by
543 specified by Address. The value written to the PCI configuration register is
571 Reads the 16-bit PCI configuration register specified by Address, performs a
572 bitwise AND between the read result and the value specified by AndData, and
573 writes the result to the 16-bit PCI configuration register specified by
602 Reads the 16-bit PCI configuration register specified by Address, performs a
603 bitwise AND between the read result and the value specified by AndData,
605 the value specified by OrData, and writes the result to the 16-bit PCI
606 configuration register specified by Address. The value written to the PCI
640 specified by the StartBit and the EndBit. The value of the bit field is
677 field is specified by the StartBit and the EndBit. All other bits in the
686 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
719 Reads the 16-bit PCI configuration register specified by Address, performs a
720 bitwise OR between the read result and the value specified by
722 specified by Address. The value written to the PCI configuration register is
731 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
764 Reads the 16-bit PCI configuration register specified by Address, performs a
765 bitwise AND between the read result and the value specified by AndData, and
766 writes the result to the 16-bit PCI configuration register specified by
776 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
810 Reads the 16-bit PCI configuration register specified by Address, performs a
812 the value specified by AndData, and writes the result to the 16-bit PCI
813 configuration register specified by Address. The value written to the PCI
823 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
824 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
859 Reads and returns the 32-bit PCI configuration register specified by Address.
884 Writes the 32-bit PCI configuration register specified by Address with the
885 value specified by Value. Value is returned. This function must guarantee
912 Reads the 32-bit PCI configuration register specified by Address, performs a
913 bitwise OR between the read result and the value specified by
915 specified by Address. The value written to the PCI configuration register is
943 Reads the 32-bit PCI configuration register specified by Address, performs a
944 bitwise AND between the read result and the value specified by AndData, and
945 writes the result to the 32-bit PCI configuration register specified by
974 Reads the 32-bit PCI configuration register specified by Address, performs a
975 bitwise AND between the read result and the value specified by AndData,
977 the value specified by OrData, and writes the result to the 32-bit PCI
978 configuration register specified by Address. The value written to the PCI
1012 specified by the StartBit and the EndBit. The value of the bit field is
1049 field is specified by the StartBit and the EndBit. All other bits in the
1058 If Value is larger than the bitmask value range specified
1091 Reads the 32-bit PCI configuration register specified by Address, performs a
1092 bitwise OR between the read result and the value specified by
1094 specified by Address. The value written to the PCI configuration register is
1103 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1136 Reads the 32-bit PCI configuration register specified by Address, performs a
1137 bitwise AND between the read result and the value specified by AndData, and
1138 writes the result to the 32-bit PCI configuration register specified by
1148 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1182 Reads the 32-bit PCI configuration register specified by Address, performs a
1184 the value specified by AndData, and writes the result to the 32-bit PCI
1185 configuration register specified by Address. The value written to the PCI
1195 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1196 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1231 Reads the range of PCI configuration registers specified by StartAddress and
1232 Size into the buffer specified by Buffer. This function only allows the PCI
1331 Copies the data in a caller supplied buffer to a specified range of PCI
1334 Writes the range of PCI configuration registers specified by StartAddress and
1335 Size from the buffer specified by Buffer. This function only allows the PCI