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81   It reads and returns the PCI configuration register specified by Address,

82 the width of data is specified by Width.
114 It writes the PCI configuration register specified by Address with the
115 value specified by Data. The width of data is specified by Width.
147 Registers the PCI device specified by Address so all the PCI configuration registers
177 Reads and returns the 8-bit PCI configuration register specified by Address.
203 Writes the 8-bit PCI configuration register specified by Address with the
204 value specified by Value. Value is returned. This function must guarantee
232 Reads the 8-bit PCI configuration register specified by Address, performs a
233 bitwise OR between the read result and the value specified by
235 specified by Address. The value written to the PCI configuration register is
262 Reads the 8-bit PCI configuration register specified by Address, performs a
263 bitwise AND between the read result and the value specified by AndData, and
264 writes the result to the 8-bit PCI configuration register specified by
292 Reads the 8-bit PCI configuration register specified by Address, performs a
293 bitwise AND between the read result and the value specified by AndData,
295 the value specified by OrData, and writes the result to the 8-bit PCI
296 configuration register specified by Address. The value written to the PCI
325 specified by the StartBit and the EndBit. The value of the bit field is
357 field is specified by the StartBit and the EndBit. All other bits in the
365 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
396 Reads the 8-bit PCI configuration register specified by Address, performs a
397 bitwise OR between the read result and the value specified by
399 specified by Address. The value written to the PCI configuration register is
407 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
438 Reads the 8-bit PCI configuration register specified by Address, performs a
439 bitwise AND between the read result and the value specified by AndData, and
440 writes the result to the 8-bit PCI configuration register specified by
449 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
481 Reads the 8-bit PCI configuration register specified by Address, performs a
483 the value specified by AndData, and writes the result to the 8-bit PCI
484 configuration register specified by Address. The value written to the PCI
493 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
494 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
526 Reads and returns the 16-bit PCI configuration register specified by Address.
553 Writes the 16-bit PCI configuration register specified by Address with the
554 value specified by Value. Value is returned. This function must guarantee
583 Reads the 16-bit PCI configuration register specified by Address, performs a
584 bitwise OR between the read result and the value specified by
586 specified by Address. The value written to the PCI configuration register is
614 Reads the 16-bit PCI configuration register specified by Address, performs a
615 bitwise AND between the read result and the value specified by AndData, and
616 writes the result to the 16-bit PCI configuration register specified by
645 Reads the 16-bit PCI configuration register specified by Address, performs a
646 bitwise AND between the read result and the value specified by AndData,
648 the value specified by OrData, and writes the result to the 16-bit PCI
649 configuration register specified by Address. The value written to the PCI
679 specified by the StartBit and the EndBit. The value of the bit field is
712 field is specified by the StartBit and the EndBit. All other bits in the
721 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
752 Reads the 16-bit PCI configuration register specified by Address, performs a
753 bitwise OR between the read result and the value specified by
755 specified by Address. The value written to the PCI configuration register is
764 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
795 Reads the 16-bit PCI configuration register specified by Address, performs a
796 bitwise AND between the read result and the value specified by AndData, and
797 writes the result to the 16-bit PCI configuration register specified by
807 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
839 Reads the 16-bit PCI configuration register specified by Address, performs a
841 the value specified by AndData, and writes the result to the 16-bit PCI
842 configuration register specified by Address. The value written to the PCI
852 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
853 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
885 Reads and returns the 32-bit PCI configuration register specified by Address.
912 Writes the 32-bit PCI configuration register specified by Address with the
913 value specified by Value. Value is returned. This function must guarantee
942 Reads the 32-bit PCI configuration register specified by Address, performs a
943 bitwise OR between the read result and the value specified by
945 specified by Address. The value written to the PCI configuration register is
973 Reads the 32-bit PCI configuration register specified by Address, performs a
974 bitwise AND between the read result and the value specified by AndData, and
975 writes the result to the 32-bit PCI configuration register specified by
1004 Reads the 32-bit PCI configuration register specified by Address, performs a
1005 bitwise AND between the read result and the value specified by AndData,
1007 the value specified by OrData, and writes the result to the 32-bit PCI
1008 configuration register specified by Address. The value written to the PCI
1038 specified by the StartBit and the EndBit. The value of the bit field is
1071 field is specified by the StartBit and the EndBit. All other bits in the
1080 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1111 Reads the 32-bit PCI configuration register specified by Address, performs a
1112 bitwise OR between the read result and the value specified by
1114 specified by Address. The value written to the PCI configuration register is
1123 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1154 Reads the 32-bit PCI configuration register specified by Address, performs a
1155 bitwise AND between the read result and the value specified by AndData, and
1156 writes the result to the 32-bit PCI configuration register specified by
1166 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1198 Reads the 32-bit PCI configuration register specified by Address, performs a
1200 the value specified by AndData, and writes the result to the 32-bit PCI
1201 configuration register specified by Address. The value written to the PCI
1211 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1212 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1244 Reads the range of PCI configuration registers specified by StartAddress and
1245 Size into the buffer specified by Buffer. This function only allows the PCI
1339 Copies the data in a caller supplied buffer to a specified range of PCI
1342 Writes the range of PCI configuration registers specified by StartAddress and
1343 Size from the buffer specified by Buffer. This function only allows the PCI