Lines Matching full:specified
171 It reads and returns the PCI configuration register specified by Address,
172 the width of data is specified by Width.
208 It writes the PCI configuration register specified by Address with the
209 value specified by Data. The width of data is specifed by Width.
274 Reads and returns the 8-bit PCI configuration register specified by Address.
281 @return The 8-bit PCI configuration register specified by Address.
298 Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
324 Reads the 8-bit PCI configuration register specified by Address,
325 performs a bitwise OR between the read result and the value specified by OrData,
326 and writes the result to the 8-bit PCI configuration register specified by Address.
351 Reads the 8-bit PCI configuration register specified by Address,
352 performs a bitwise AND between the read result and the value specified by AndData,
353 and writes the result to the 8-bit PCI configuration register specified by Address.
378 Reads the 8-bit PCI configuration register specified by Address,
379 performs a bitwise AND between the read result and the value specified by AndData,
380 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
381 and writes the result to the 8-bit PCI configuration register specified by Address.
409 specified by the StartBit and the EndBit. The value of the bit field is
441 field is specified by the StartBit and the EndBit. All other bits in the
449 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
480 Reads the 8-bit PCI configuration register specified by Address, performs a
481 bitwise OR between the read result and the value specified by
483 specified by Address. The value written to the PCI configuration register is
491 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
522 Reads the 8-bit PCI configuration register specified by Address, performs a
523 bitwise AND between the read result and the value specified by AndData, and
524 writes the result to the 8-bit PCI configuration register specified by
533 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
565 Reads the 8-bit PCI configuration register specified by Address, performs a
567 the value specified by AndData, and writes the result to the 8-bit PCI
568 configuration register specified by Address. The value written to the PCI
577 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
578 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
610 Reads and returns the 16-bit PCI configuration register specified by Address.
618 @return The 16-bit PCI configuration register specified by Address.
635 Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
663 Reads the 16-bit PCI configuration register specified by Address, performs a
664 bitwise OR between the read result and the value specified by
666 specified by Address. The value written to the PCI configuration register is
693 Reads the 16-bit PCI configuration register specified by Address,
694 performs a bitwise AND between the read result and the value specified by AndData,
695 and writes the result to the 16-bit PCI configuration register specified by Address.
722 Reads the 16-bit PCI configuration register specified by Address,
723 performs a bitwise AND between the read result and the value specified by AndData,
724 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
725 and writes the result to the 16-bit PCI configuration register specified by Address.
754 specified by the StartBit and the EndBit. The value of the bit field is
787 field is specified by the StartBit and the EndBit. All other bits in the
796 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
824 Reads the 16-bit PCI configuration register specified by Address,
825 performs a bitwise OR between the read result and the value specified by OrData,
826 and writes the result to the 16-bit PCI configuration register specified by Address.
833 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
864 Reads the 16-bit PCI configuration register specified by Address,
865 performs a bitwise OR between the read result and the value specified by OrData,
866 and writes the result to the 16-bit PCI configuration register specified by Address.
876 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
908 Reads the 16-bit PCI configuration register specified by Address, performs a
910 the value specified by AndData, and writes the result to the 16-bit PCI
911 configuration register specified by Address. The value written to the PCI
920 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
921 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
953 Reads and returns the 32-bit PCI configuration register specified by Address.
961 @return The 32-bit PCI configuration register specified by Address.
978 Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
1005 Reads the 32-bit PCI configuration register specified by Address,
1006 performs a bitwise OR between the read result and the value specified by OrData,
1007 and writes the result to the 32-bit PCI configuration register specified by Address.
1033 Reads the 32-bit PCI configuration register specified by Address,
1034 performs a bitwise AND between the read result and the value specified by AndData,
1035 and writes the result to the 32-bit PCI configuration register specified by Address.
1062 Reads the 32-bit PCI configuration register specified by Address,
1063 performs a bitwise AND between the read result and the value specified by AndData,
1064 performs a bitwise OR between the result of the AND operation and the value specified by OrData,
1065 and writes the result to the 32-bit PCI configuration register specified by Address.
1094 specified by the StartBit and the EndBit. The value of the bit field is
1127 field is specified by the StartBit and the EndBit. All other bits in the
1136 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1167 Reads the 32-bit PCI configuration register specified by Address, performs a
1168 bitwise OR between the read result and the value specified by
1170 specified by Address. The value written to the PCI configuration register is
1178 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1210 Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
1211 AND between the read result and the value specified by AndData, and writes the result
1212 to the 32-bit PCI configuration register specified by Address. The value written to
1220 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1252 Reads the 32-bit PCI configuration register specified by Address, performs a
1254 the value specified by AndData, and writes the result to the 32-bit PCI
1255 configuration register specified by Address. The value written to the PCI
1264 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1265 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1297 Reads the range of PCI configuration registers specified by StartAddress and
1298 Size into the buffer specified by Buffer. This function only allows the PCI
1392 Copies the data in a caller supplied buffer to a specified range of PCI
1395 Writes the range of PCI configuration registers specified by StartAddress and
1396 Size from the buffer specified by Buffer. This function only allows the PCI
