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51   Registers the PCI device specified by Address so all the PCI configuration registers 

82 Reads and returns the 8-bit PCI configuration register specified by Address.
108 Writes the 8-bit PCI configuration register specified by Address with the
109 value specified by Value. Value is returned. This function must guarantee
137 Reads the 8-bit PCI configuration register specified by Address, performs a
138 bitwise OR between the read result and the value specified by
140 specified by Address. The value written to the PCI configuration register is
169 Reads the 8-bit PCI configuration register specified by Address, performs a
170 bitwise AND between the read result and the value specified by AndData, and
171 writes the result to the 8-bit PCI configuration register specified by
201 Reads the 8-bit PCI configuration register specified by Address, performs a
202 bitwise AND between the read result and the value specified by AndData,
204 the value specified by OrData, and writes the result to the 8-bit PCI
205 configuration register specified by Address. The value written to the PCI
236 specified by the StartBit and the EndBit. The value of the bit field is
270 field is specified by the StartBit and the EndBit. All other bits in the
278 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
308 Reads the 8-bit PCI configuration register specified by Address, performs a
309 bitwise OR between the read result and the value specified by
311 specified by Address. The value written to the PCI configuration register is
319 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
349 Reads the 8-bit PCI configuration register specified by Address, performs a
350 bitwise AND between the read result and the value specified by AndData, and
351 writes the result to the 8-bit PCI configuration register specified by
360 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
391 Reads the 8-bit PCI configuration register specified by Address, performs a
393 the value specified by AndData, and writes the result to the 8-bit PCI
394 configuration register specified by Address. The value written to the PCI
403 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
404 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
435 Reads and returns the 16-bit PCI configuration register specified by Address.
462 Writes the 16-bit PCI configuration register specified by Address with the
463 specified by Value. Value is returned. This function must guarantee
492 Reads the 16-bit PCI configuration register specified by Address, performs a
493 bitwise OR between the read result and the value specified by
495 specified by Address. The value written to the PCI configuration register is
525 Reads the 16-bit PCI configuration register specified by Address, performs a
526 bitwise AND between the read result and the value specified by AndData, and
527 writes the result to the 16-bit PCI configuration register specified by
558 Reads the 16-bit PCI configuration register specified by Address, performs a
559 bitwise AND between the read result and the value specified by AndData,
561 the value specified by OrData, and writes the result to the 16-bit PCI
562 configuration register specified by Address. The value written to the PCI
594 specified by the StartBit and the EndBit. The value of the bit field is
629 field is specified by the StartBit and the EndBit. All other bits in the
638 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
668 Reads the 16-bit PCI configuration register specified by Address, performs a
669 bitwise OR between the read result and the value specified by
671 specified by Address. The value written to the PCI configuration register is
680 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
710 Reads the 16-bit PCI configuration register specified by Address, performs a
711 bitwise AND between the read result and the value specified by AndData, and
712 writes the result to the 16-bit PCI configuration register specified by
722 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
753 Reads the 16-bit PCI configuration register specified by Address, performs a
755 the value specified by AndData, and writes the result to the 16-bit PCI
756 configuration register specified by Address. The value written to the PCI
766 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
767 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
798 Reads and returns the 32-bit PCI configuration register specified by Address.
825 Writes the 32-bit PCI configuration register specified by Address with the
826 value specified by Value. Value is returned. This function must guarantee
855 Reads the 32-bit PCI configuration register specified by Address, performs a
856 bitwise OR between the read result and the value specified by
858 specified by Address. The value written to the PCI configuration register is
888 Reads the 32-bit PCI configuration register specified by Address, performs a
889 bitwise AND between the read result and the value specified by AndData, and
890 writes the result to the 32-bit PCI configuration register specified by
921 Reads the 32-bit PCI configuration register specified by Address, performs a
922 bitwise AND between the read result and the value specified by AndData,
924 the value specified by OrData, and writes the result to the 32-bit PCI
925 configuration register specified by Address. The value written to the PCI
957 specified by the StartBit and the EndBit. The value of the bit field is
992 field is specified by the StartBit and the EndBit. All other bits in the
1001 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1031 Reads the 32-bit PCI configuration register specified by Address, performs a
1032 bitwise OR between the read result and the value specified by
1034 specified by Address. The value written to the PCI configuration register is
1043 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1073 Reads the 32-bit PCI configuration register specified by Address, performs a
1074 bitwise AND between the read result and the value specified by AndData, and
1075 writes the result to the 32-bit PCI configuration register specified by
1085 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1116 Reads the 32-bit PCI configuration register specified by Address, performs a
1118 the value specified by AndData, and writes the result to the 32-bit PCI
1119 configuration register specified by Address. The value written to the PCI
1129 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1130 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
1161 Reads the range of PCI configuration registers specified by StartAddress and
1162 Size into the buffer specified by Buffer. This function only allows the PCI
1195 Copies the data in a caller supplied buffer to a specified range of PCI
1198 Writes the range of PCI configuration registers specified by StartAddress and
1199 Size from the buffer specified by Buffer. This function only allows the PCI