Lines Matching refs:MCID_Rematerializable
3202 { 8, 1, 1, 0, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable)|(1<<MCID_CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo5,0,nullptr }, // Inst #8 = IMPLICIT_DEF
3213 { 19, 1, 1, 0, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MayLoad)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10,0,nullptr }, // Inst #19 = LOAD_STACK_GUARD
3223 { 29, 6, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #29 = ADDri
3229 { 35, 4, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xd01ULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #35 = ADR
3234 { 40, 6, 1, 264, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #40 = ANDri
3245 { 51, 6, 1, 264, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #51 = BICri
3292 { 98, 6, 1, 264, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #98 = EORri
3296 { 102, 4, 1, 487, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x8c00ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #102 = FCONSTD
3297 { 103, 4, 1, 488, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x8c00ULL, nullptr, nullptr, OperandInfo49,0,nullptr }, // Inst #103 = FCONSTS
3352 { 158, 5, 1, 325, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x310ULL, nullptr, nullptr, OperandInfo58,0,nullptr }, // Inst #158 = LDRBi12
3353 { 159, 6, 1, 326, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x300ULL, nullptr, nullptr, OperandInfo59,0,nullptr }, // Inst #159 = LDRBrs
3367 { 173, 2, 1, 34, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo65,0,nullptr }, // Inst #173 = LDRLIT_ga_pcrel
3368 { 174, 2, 1, 0, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MayLoad)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo65,0,nullptr }, // Inst #174 = LDRLIT_ga_pcrel_ldr
3386 { 192, 5, 1, 336, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x310ULL, nullptr, nullptr, OperandInfo43,0,nullptr }, // Inst #192 = LDRcp
3387 { 193, 5, 1, 328, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x310ULL, nullptr, nullptr, OperandInfo43,0,nullptr }, // Inst #193 = LDRi12
3388 { 194, 6, 1, 287, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x300ULL, nullptr, nullptr, OperandInfo66,0,nullptr }, // Inst #194 = LDRrs
3412 { 218, 2, 1, 275, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo65,0,nullptr }, // Inst #218 = MOV_ga_pcrel
3413 { 219, 2, 1, 276, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MayLoad)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo65,0,nullptr }, // Inst #219 = MOV_ga_pcrel_ldr
3414 { 220, 5, 1, 41, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef)|(1<<MCID_CheapAsAMove), 0x2201ULL, nullptr, nullptr, OperandInfo82,0,nullptr }, // Inst #220 = MOVi
3415 { 221, 4, 1, 41, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_CheapAsAMove), 0x2201ULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #221 = MOVi16
3417 { 223, 2, 1, 274, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MoveImm)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo65,0,nullptr }, // Inst #223 = MOVi32imm
3435 { 241, 5, 1, 52, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef)|(1<<MCID_CheapAsAMove), 0x2201ULL, nullptr, nullptr, OperandInfo82,0,nullptr }, // Inst #241 = MVNi
3439 { 245, 6, 1, 264, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #245 = ORRri
3489 { 295, 6, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #295 = RSBri
3647 { 453, 6, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0x201ULL, nullptr, nullptr, OperandInfo12,0,nullptr }, // Inst #453 = SUBri
4447 { 1253, 5, 1, 508, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x18b05ULL, nullptr, nullptr, OperandInfo189,0,nullptr }, // Inst #1253 = VLDRD
4448 { 1254, 5, 1, 509, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x18b05ULL, nullptr, nullptr, OperandInfo190,0,nullptr }, // Inst #1254 = VLDRS
4538 { 1344, 1, 1, 101, 4, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable)|(1<<MCID_CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo200,0,nullptr }, // Inst #1344 = VMOVD0
4550 { 1356, 1, 1, 101, 4, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable)|(1<<MCID_CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo203,0,nullptr }, // Inst #1356 = VMOVQ0
4558 { 1364, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1364 = VMOVv16i8
4559 { 1365, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1365 = VMOVv1i64
4560 { 1366, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1366 = VMOVv2f32
4561 { 1367, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1367 = VMOVv2i32
4562 { 1368, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1368 = VMOVv2i64
4563 { 1369, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1369 = VMOVv4f32
4564 { 1370, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1370 = VMOVv4i16
4565 { 1371, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1371 = VMOVv4i32
4566 { 1372, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1372 = VMOVv8i16
4567 { 1373, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1373 = VMOVv8i8
4613 { 1419, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1419 = VMVNv2i32
4614 { 1420, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo48,0,nullptr }, // Inst #1420 = VMVNv4i16
4615 { 1421, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1421 = VMVNv4i32
4616 { 1422, 4, 1, 489, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x10f80ULL, nullptr, nullptr, OperandInfo210,0,nullptr }, // Inst #1422 = VMVNv8i16
5484 { 2290, 6, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0xc80ULL, nullptr, nullptr, OperandInfo274,0,nullptr }, // Inst #2290 = t2ADDri
5569 { 2375, 4, 1, 329, 4, 0|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #2375 = t2LDRBpci
5584 { 2390, 4, 1, 329, 4, 0|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #2390 = t2LDRHpci
5592 { 2398, 4, 1, 337, 4, 0|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #2398 = t2LDRSBpci
5600 { 2406, 4, 1, 337, 4, 0|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #2406 = t2LDRSHpci
5606 { 2412, 5, 1, 330, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8bULL, nullptr, nullptr, OperandInfo43,0,nullptr }, // Inst #2412 = t2LDRi12
5607 { 2413, 5, 1, 330, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8cULL, nullptr, nullptr, OperandInfo43,0,nullptr }, // Inst #2413 = t2LDRi8
5608 { 2414, 4, 1, 330, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8eULL, nullptr, nullptr, OperandInfo23,0,nullptr }, // Inst #2414 = t2LDRpci
5609 { 2415, 3, 1, 331, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo295,0,nullptr }, // Inst #2415 = t2LDRpci_pic
5611 { 2417, 6, 1, 332, 4, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8dULL, nullptr, nullptr, OperandInfo291,0,nullptr }, // Inst #2417 = t2LDRs
5612 { 2418, 4, 1, 1, 4, 0|(1<<MCID_Pseudo)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo296,0,nullptr }, // Inst #2418 = t2LEApcrel
5636 { 2442, 2, 1, 294, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo306,0,nullptr }, // Inst #2442 = t2MOV_ga_pcrel
5637 { 2443, 5, 1, 41, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef)|(1<<MCID_CheapAsAMove), 0xc80ULL, nullptr, nullptr, OperandInfo307,0,nullptr }, // Inst #2443 = t2MOVi
5638 { 2444, 4, 1, 41, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_CheapAsAMove), 0xc80ULL, nullptr, nullptr, OperandInfo278,0,nullptr }, // Inst #2444 = t2MOVi16
5640 { 2446, 2, 1, 293, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MoveImm)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo306,0,nullptr }, // Inst #2446 = t2MOVi32imm
5657 { 2463, 5, 1, 52, 4, 0|(1<<MCID_MoveImm)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef)|(1<<MCID_CheapAsAMove), 0xc80ULL, nullptr, nullptr, OperandInfo307,0,nullptr }, // Inst #2463 = t2MVNi
5825 { 2631, 6, 1, 1, 4, 0|(1<<MCID_Predicable)|(1<<MCID_Rematerializable)|(1<<MCID_HasOptionalDef), 0xc80ULL, nullptr, nullptr, OperandInfo274,0,nullptr }, // Inst #2631 = t2SUBri
5922 { 2728, 5, 1, 329, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc87ULL, nullptr, nullptr, OperandInfo348,0,nullptr }, // Inst #2728 = tLDRBi
5923 { 2729, 5, 1, 333, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc87ULL, nullptr, nullptr, OperandInfo349,0,nullptr }, // Inst #2729 = tLDRBr
5924 { 2730, 5, 1, 329, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc88ULL, nullptr, nullptr, OperandInfo348,0,nullptr }, // Inst #2730 = tLDRHi
5925 { 2731, 5, 1, 333, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc88ULL, nullptr, nullptr, OperandInfo349,0,nullptr }, // Inst #2731 = tLDRHr
5930 { 2736, 5, 1, 330, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc89ULL, nullptr, nullptr, OperandInfo348,0,nullptr }, // Inst #2736 = tLDRi
5931 { 2737, 4, 1, 330, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc8aULL, nullptr, nullptr, OperandInfo339,0,nullptr }, // Inst #2737 = tLDRpci
5932 { 2738, 3, 1, 327, 0, 0|(1<<MCID_Pseudo)|(1<<MCID_MayLoad)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo83,0,nullptr }, // Inst #2738 = tLDRpci_pic
5933 { 2739, 5, 1, 334, 2, 0|(1<<MCID_FoldableAsLoad)|(1<<MCID_MayLoad)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0xc89ULL, nullptr, nullptr, OperandInfo349,0,nullptr }, // Inst #2739 = tLDRr
5935 { 2741, 4, 1, 259, 2, 0|(1<<MCID_Pseudo)|(1<<MCID_Predicable)|(1<<MCID_Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo352,0,nullptr }, // Inst #2741 = tLEApcrel
