Lines Matching defs:Rs
532 // BOVC if rs >= rt
533 // BEQZALC if rs == 0 && rt != 0
534 // BEQC if rs < rt && rs != 0
536 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
541 if (Rs >= Rt) {
544 } else if (Rs != 0 && Rs < Rt) {
551 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
568 // BNVC if rs >= rt
569 // BNEZALC if rs == 0 && rt != 0
570 // BNEC if rs < rt && rs != 0
572 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
577 if (Rs >= Rt) {
580 } else if (Rs != 0 && Rs < Rt) {
587 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
604 // Invalid if rs == 0
605 // BLEZC if rs == 0 && rt != 0
606 // BGEZC if rs == rt && rt != 0
607 // BGEC if rs != rt && rs != 0 && rt != 0
609 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
616 else if (Rs == 0)
618 else if (Rs == Rt)
626 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
644 // Invalid if rs == 0
645 // BGTZC if rs == 0 && rt != 0
646 // BLTZC if rs == rt && rt != 0
647 // BLTC if rs != rt && rs != 0 && rt != 0
651 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
657 else if (Rs == 0)
659 else if (Rs == Rt)
667 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
685 // BGTZALC if rs == 0 && rt != 0
686 // BLTZALC if rs != 0 && rs == rt
687 // BLTUC if rs != 0 && rs != rt
689 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
698 } else if (Rs == 0) {
701 } else if (Rs == Rt) {
711 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
730 // Invalid if rs == 0
731 // BLEZALC if rs == 0 && rt != 0
732 // BGEZALC if rs == rt && rt != 0
733 // BGEUC if rs != rt && rs != 0 && rt != 0
735 uint32_t Rs = fieldFromInstruction(insn, 21, 5);
742 else if (Rs == 0)
744 else if (Rs == Rt)
752 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs));
