Lines Matching defs:Rt
532 // BOVC if rs >= rt
533 // BEQZALC if rs == 0 && rt != 0
534 // BEQC if rs < rt && rs != 0
537 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
541 if (Rs >= Rt) {
544 } else if (Rs != 0 && Rs < Rt) {
553 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
568 // BNVC if rs >= rt
569 // BNEZALC if rs == 0 && rt != 0
570 // BNEC if rs < rt && rs != 0
573 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
577 if (Rs >= Rt) {
580 } else if (Rs != 0 && Rs < Rt) {
589 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
605 // BLEZC if rs == 0 && rt != 0
606 // BGEZC if rs == rt && rt != 0
607 // BGEC if rs != rt && rs != 0 && rt != 0
610 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
614 if (Rt == 0)
618 else if (Rs == Rt)
628 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
645 // BGTZC if rs == 0 && rt != 0
646 // BLTZC if rs == rt && rt != 0
647 // BLTC if rs != rt && rs != 0 && rt != 0
652 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
655 if (Rt == 0)
659 else if (Rs == Rt)
669 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
684 // BGTZ if rt == 0
685 // BGTZALC if rs == 0 && rt != 0
686 // BLTZALC if rs != 0 && rs == rt
687 // BLTUC if rs != 0 && rs != rt
690 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
695 if (Rt == 0) {
701 } else if (Rs == Rt) {
714 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
731 // BLEZALC if rs == 0 && rt != 0
732 // BGEZALC if rs == rt && rt != 0
733 // BGEUC if rs != rt && rs != 0 && rt != 0
736 uint32_t Rt = fieldFromInstruction(insn, 16, 5);
740 if (Rt == 0)
744 else if (Rs == Rt)
754 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt));
1062 unsigned Rt = fieldFromInstruction(Insn, 16, 5);
1065 Rt = getReg(Decoder, Mips_GPR32RegClassID, Rt);
1070 MCOperand_CreateReg0(Inst, Rt);
1073 MCOperand_CreateReg0(Inst, Rt);
