Lines Matching full:detail
92 if (MI->csh->detail != CS_OPT_ON)
96 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_MEM;
97 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = MIPS_REG_INVALID;
98 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = 0;
101 MI->flat_insn->detail->mips.op_count++;
196 if (MI->csh->detail) {
198 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = reg;
200 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_REG;
201 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].reg = reg;
202 MI->flat_insn->detail->mips.op_count++;
221 if (MI->csh->detail)
222 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = imm;
236 if (MI->csh->detail) {
237 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
238 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm;
239 MI->flat_insn->detail->mips.op_count++;
261 if (MI->csh->detail) {
262 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
263 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = (unsigned short int)imm;
264 MI->flat_insn->detail->mips.op_count++;
279 if (MI->csh->detail) {
280 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_IMM;
281 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].imm = imm;
282 MI->flat_insn->detail->mips.op_count++;
