Lines Matching full:next
160 // CHECK-NEXT: [[X:%.*]] = alloca float
161 // CHECK-NEXT: [[F:%.*]] = alloca float
162 // CHECK-NEXT: [[TMP0:%.*]] = alloca float
163 // CHECK-NEXT: [[TMP1:%.*]] = alloca float
164 // CHECK-NEXT: store float* {{%.*}}, float** [[FP]]
166 // CHECK-NEXT: [[T0:%.*]] = load float*, float** [[FP]]
167 // CHECK-NEXT: store float 1.000000e+00, float* [[T0]], align 4
170 // CHECK-NEXT: store float 2.000000e+00, float* [[X]], align 4
173 // CHECK-NEXT: [[T0:%.*]] = load float*, float** [[FP]]
174 // CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i8*
175 // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[TMP0]] to i8*
176 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 4, i8* [[T1]], i8* [[T2]], i32 5)
177 // CHECK-NEXT: [[T3:%.*]] = load float, float* [[TMP0]], align 4
178 // CHECK-NEXT: store float [[T3]], float* [[F]]
181 // CHECK-NEXT: [[T0:%.*]] = load float, float* [[F]], align 4
182 // CHECK-NEXT: [[T1:%.*]] = load float*, float** [[FP]], align 4
183 // CHECK-NEXT: store float [[T0]], float* [[TMP1]], align 4
184 // CHECK-NEXT: [[T2:%.*]] = bitcast float* [[T1]] to i8*
185 // CHECK-NEXT: [[T3:%.*]] = bitcast float* [[TMP1]] to i8*
186 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 4, i8* [[T2]], i8* [[T3]], i32 5)
189 // CHECK-NEXT: ret void
195 // CHECK-NEXT: [[X:%.*]] = alloca [[CF]], align 8
196 // CHECK-NEXT: [[F:%.*]] = alloca [[CF]], align 4
197 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[CF]], align 8
198 // CHECK-NEXT: [[TMP1:%.*]] = alloca [[CF]], align 8
199 // CHECK-NEXT: store [[CF]]*
201 // CHECK-NEXT: [[P:%.*]] = load [[CF]]*, [[CF]]** [[FP]]
202 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[P]], i32 0, i32 0
203 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[P]], i32 0, i32 1
204 // CHECK-NEXT: store float 1.000000e+00, float* [[T0]]
205 // CHECK-NEXT: store float 0.000000e+00, float* [[T1]]
208 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[X]], i32 0, i32 0
209 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[X]], i32 0, i32 1
210 // CHECK-NEXT: store float 2.000000e+00, float* [[T0]]
211 // CHECK-NEXT: store float 0.000000e+00, float* [[T1]]
214 // CHECK-NEXT: [[T0:%.*]] = load [[CF]]*, [[CF]]** [[FP]]
215 // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i8*
216 // CHECK-NEXT: [[T2:%.*]] = bitcast [[CF]]* [[TMP0]] to i8*
217 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
218 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 0
219 // CHECK-NEXT: [[R:%.*]] = load float, float* [[T0]]
220 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP0]], i32 0, i32 1
221 // CHECK-NEXT: [[I:%.*]] = load float, float* [[T0]]
222 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[F]], i32 0, i32 0
223 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[F]], i32 0, i32 1
224 // CHECK-NEXT: store float [[R]], float* [[T0]]
225 // CHECK-NEXT: store float [[I]], float* [[T1]]
228 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[F]], i32 0, i32 0
229 // CHECK-NEXT: [[R:%.*]] = load float, float* [[T0]]
230 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[F]], i32 0, i32 1
231 // CHECK-NEXT: [[I:%.*]] = load float, float* [[T0]]
232 // CHECK-NEXT: [[DEST:%.*]] = load [[CF]]*, [[CF]]** [[FP]], align 4
233 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP1]], i32 0, i32 0
234 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]], [[CF]]* [[TMP1]], i32 0, i32 1
235 // CHECK-NEXT: store float [[R]], float* [[T0]]
236 // CHECK-NEXT: store float [[I]], float* [[T1]]
237 // CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i8*
238 // CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[TMP1]] to i8*
239 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T0]], i8* [[T1]], i32 5)
242 // CHECK-NEXT: ret void
250 // CHECK-NEXT: [[X:%.*]] = alloca [[S]], align 8
251 // CHECK-NEXT: [[F:%.*]] = alloca [[S:%.*]], align 2
252 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[S]], align 8
253 // CHECK-NEXT: store [[S]]*
255 // CHECK-NEXT: [[P:%.*]] = load [[S]]*, [[S]]** [[FP]]
256 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 0
257 // CHECK-NEXT: store i16 1, i16* [[T0]], align 8
258 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 1
259 // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
260 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 2
261 // CHECK-NEXT: store i16 3, i16* [[T0]], align 4
262 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[P]], i32 0, i32 3
263 // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
266 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 0
267 // CHECK-NEXT: store i16 1, i16* [[T0]], align 8
268 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 1
269 // CHECK-NEXT: store i16 2, i16* [[T0]], align 2
270 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 2
271 // CHECK-NEXT: store i16 3, i16* [[T0]], align 4
272 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[S]], [[S]]* [[X]], i32 0, i32 3
273 // CHECK-NEXT: store i16 4, i16* [[T0]], align 2
276 // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]]
277 // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i8*
278 // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
279 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
282 // CHECK-NEXT: [[T0:%.*]] = load [[S]]*, [[S]]** [[FP]]
283 // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
284 // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
285 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 8, i32 2, i1 false)
286 // CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i8*
287 // CHECK-NEXT: [[T4:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
288 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T3]], i8* [[T4]], i32 5)
291 // CHECK-NEXT: ret void
299 // CHECK-NEXT: [[X:%.*]] = alloca [[APS]], align 8
300 // CHECK-NEXT: [[F:%.*]] = alloca [[PS:%.*]], align 2
301 // CHECK-NEXT: [[TMP0:%.*]] = alloca [[APS]], align 8
302 // CHECK-NEXT: [[TMP1:%.*]] = alloca [[APS]], align 8
303 // CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
304 // CHECK-NEXT: [[TMP2:%.*]] = alloca %struct.PS, align 2
305 // CHECK-NEXT: [[TMP3:%.*]] = alloca [[APS]], align 8
306 // CHECK-NEXT: store [[APS]]*
308 // CHECK-NEXT: [[P:%.*]] = load [[APS]]*, [[APS]]** [[FP]]
309 // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[P]] to i8*
310 // CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 8, i32 8, i1 false)
311 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[P]], i32 0, i32 0
312 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
313 // CHECK-NEXT: store i16 1, i16* [[T1]], align 8
314 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
315 // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
316 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
317 // CHECK-NEXT: store i16 3, i16* [[T1]], align 4
320 // CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[X]] to i8*
321 // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T0]], i8 0, i32 8, i32 8, i1 false)
322 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[X]], i32 0, i32 0
323 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 0
324 // CHECK-NEXT: store i16 1, i16* [[T1]], align 8
325 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 1
326 // CHECK-NEXT: store i16 2, i16* [[T1]], align 2
327 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[PS]], [[PS]]* [[T0]], i32 0, i32 2
328 // CHECK-NEXT: store i16 3, i16* [[T1]], align 4
331 // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]]
332 // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8*
333 // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP0]] to i8*
334 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
335 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP0]], i32 0, i32 0
336 // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8*
337 // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8*
338 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 6, i32 2, i1 false)
341 // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]]
342 // CHECK-NEXT: [[T1:%.*]] = bitcast { %struct.PS, [2 x i8] }* [[TMP1]] to i8*
343 // CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* [[T1]], i8 0, i32 8, i32 8, i1 false)
344 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP1]], i32 0, i32 0
345 // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T1]] to i8*
346 // CHECK-NEXT: [[T3:%.*]] = bitcast [[PS]]* [[F]] to i8*
347 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T2]], i8* [[T3]], i32 6, i32 2, i1 false)
348 // CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[T0]] to i8*
349 // CHECK-NEXT: [[T5:%.*]] = bitcast [[APS]]* [[TMP1]] to i8*
350 // CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T4]], i8* [[T5]], i32 5)
353 // CHECK-NEXT: [[T0:%.*]] = load [[APS]]*, [[APS]]** [[FP]], align 4
354 // CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8*
355 // CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP3]] to i8*
356 // CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
357 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]], [[APS]]* [[TMP3]], i32 0, i32 0
358 // CHECK-NEXT: [[T1:%.*]] = bitcast %struct.PS* [[TMP2]] to i8*
359 // CHECK-NEXT: [[T2:%.*]] = bitcast %struct.PS* [[T0]] to i8*
360 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 6, i32 2, i1 false)
361 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds %struct.PS, %struct.PS* [[TMP2]], i32 0, i32 0
362 // CHECK-NEXT: [[T1:%.*]] = load i16, i16* [[T0]], align 2
363 // CHECK-NEXT: [[T2:%.*]] = sext i16 [[T1]] to i32
364 // CHECK-NEXT: store i32 [[T2]], i32* [[A]], align 4
367 // CHECK-NEXT: ret void
