Lines Matching full:next
15 // CHECK-NEXT: store i32 [[MUL]], i32*
16 // CHECK-NEXT: ret void
17 // CHECK-NEXT: }
20 // CHECK-LOAD-NEXT: store i32 [[MUL]], i32*
21 // CHECK-LOAD-NEXT: ret void
22 // CHECK-LOAD-NEXT: }
28 // CHECK-NEXT: [[TRUNC:%.+]] = trunc i32 [[MUL]] to i8
29 // CHECK-NEXT: store i8 [[TRUNC]], i8*
30 // CHECK-NEXT: ret void
31 // CHECK-NEXT: }
37 // CHECK-LOAD-NEXT: [[TRUNC:%.+]] = trunc i32 [[MUL]] to i8
38 // CHECK-LOAD-NEXT: store i8 [[TRUNC]], i8*
39 // CHECK-LOAD-NEXT: ret void
40 // CHECK-LOAD-NEXT: }
53 // CHECK-NEXT: store i32 [[XOR]], i32*
54 // CHECK-NEXT: ret void
55 // CHECK-NEXT: }
59 // CHECK-NEXT: store i32 [[ADD]], i32*
60 // CHECK-NEXT: ret void
61 // CHECK-NEXT: }
70 // CHECK-NEXT: ret void
71 // CHECK-NEXT: }
74 // CHECK-NEXT: ret void
75 // CHECK-NEXT: }
79 // CHECK-LOAD-NEXT: ret void
80 // CHECK-LOAD-NEXT: }
83 // CHECK-LOAD-NEXT: ret void
84 // CHECK-LOAD-NEXT: }
128 // CHECK-LOAD-NEXT: store i32 [[XOR]], i32*
129 // CHECK-LOAD-NEXT: ret void
130 // CHECK-LOAD-NEXT: }
134 // CHECK-LOAD-NEXT: store i32 [[ADD]], i32*
135 // CHECK-LOAD-NEXT: ret void
136 // CHECK-LOAD-NEXT: }
140 // CHECK-NEXT: store i32 [[ADD]], i32*
141 // CHECK-NEXT: ret void
142 // CHECK-NEXT: }
145 // CHECK-LOAD-NEXT: store i32 [[ADD]], i32*
146 // CHECK-LOAD-NEXT: ret void
147 // CHECK-LOAD-NEXT: }
151 // CHECK-NEXT: store i32 [[MUL]], i32*
152 // CHECK-NEXT: ret void
153 // CHECK-NEXT: }
156 // CHECK-LOAD-NEXT: store i32 [[MUL]], i32*
157 // CHECK-LOAD-NEXT: ret void
158 // CHECK-LOAD-NEXT: }
162 // CHECK-NEXT: store i32 [[DIV]], i32*
163 // CHECK-NEXT: ret void
164 // CHECK-NEXT: }
167 // CHECK-LOAD-NEXT: store i32 [[DIV]], i32*
168 // CHECK-LOAD-NEXT: ret void
169 // CHECK-LOAD-NEXT: }
173 // CHECK-NEXT: store i32 [[SUB]], i32*
174 // CHECK-NEXT: ret void
175 // CHECK-NEXT: }
178 // CHECK-LOAD-NEXT: store i32 [[SUB]], i32*
179 // CHECK-LOAD-NEXT: ret void
180 // CHECK-LOAD-NEXT: }
