Lines Matching refs:src
16 inline void prefetch_load_int(unsigned char *src) {
17 __asm__ __volatile__("pref 0, 0(%[src]) \n\t" : : [src] "r"(src));
20 __inline void vp8_copy_mem16x16_dspr2(unsigned char *RESTRICT src,
28 /* load src data in cache memory */
29 prefetch_load_int(src + src_stride);
33 "ulw %[a0], 0(%[src]) \n\t"
34 "ulw %[a1], 4(%[src]) \n\t"
35 "ulw %[a2], 8(%[src]) \n\t"
36 "ulw %[a3], 12(%[src]) \n\t"
42 : [src] "r"(src), [dst] "r"(dst));
44 src += src_stride;
49 __inline void vp8_copy_mem8x8_dspr2(unsigned char *RESTRICT src, int src_stride,
55 /* load src data in cache memory */
56 prefetch_load_int(src + src_stride);
61 "ulw %[a0], 0(%[src]) \n\t"
62 "ulw %[a1], 4(%[src]) \n\t"
66 : [src] "r"(src), [dst] "r"(dst));
68 src += src_stride;
73 __inline void vp8_copy_mem8x4_dspr2(unsigned char *RESTRICT src, int src_stride,
79 /* load src data in cache memory */
80 prefetch_load_int(src + src_stride);
85 "ulw %[a0], 0(%[src]) \n\t"
86 "ulw %[a1], 4(%[src]) \n\t"
90 : [src] "r"(src), [dst] "r"(dst));
92 src += src_stride;
