Lines Matching defs:header
641 amd_kernel_code_t header;
643 AMDGPU::initDefaultAMDKernelCodeT(header, STM.getFeatureBits());
645 header.compute_pgm_resource_registers =
648 header.code_properties = AMD_CODE_PROPERTY_IS_PTR64;
651 AMD_HSA_BITS_SET(header.code_properties,
656 header.code_properties |=
661 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR;
664 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR;
667 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR;
670 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID;
673 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT;
678 header.code_properties |=
683 header.code_properties |=
688 header.code_properties |=
693 header.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR;
696 header.code_properties |= AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED;
699 header.code_properties |= AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED;
701 header.kernarg_segment_byte_size = MFI->ABIArgOffset;
702 header.wavefront_sgpr_count = KernelInfo.NumSGPR;
703 header.workitem_vgpr_count = KernelInfo.NumVGPR;
704 header.workitem_private_segment_byte_size = KernelInfo.ScratchSize;
705 header.workgroup_group_segment_byte_size = KernelInfo.LDSSize;
706 header.reserved_vgpr_first = KernelInfo.ReservedVGPRFirst;
707 header.reserved_vgpr_count = KernelInfo.ReservedVGPRCount;
710 header.debug_wavefront_private_segment_offset_sgpr =
712 header.debug_private_segment_buffer_sgpr =
720 TS->EmitAMDKernelCodeT(header);
