Lines Matching full:case
132 case X86II::MO_DLLIMPORT:
136 case X86II::MO_DARWIN_NONLAZY:
137 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
163 case X86II::MO_DARWIN_NONLAZY:
164 case X86II::MO_DARWIN_NONLAZY_PIC_BASE: {
190 case X86II::MO_NO_FLAG: // No flag.
192 case X86II::MO_DARWIN_NONLAZY:
193 case X86II::MO_DLLIMPORT:
196 case X86II::MO_TLVP: RefKind = MCSymbolRefExpr::VK_TLVP; break;
197 case X86II::MO_TLVP_PIC_BASE:
205 case X86II::MO_SECREL: RefKind = MCSymbolRefExpr::VK_SECREL; break;
206 case X86II::MO_TLSGD: RefKind = MCSymbolRefExpr::VK_TLSGD; break;
207 case X86II::MO_TLSLD: RefKind = MCSymbolRefExpr::VK_TLSLD; break;
208 case X86II::MO_TLSLDM: RefKind = MCSymbolRefExpr::VK_TLSLDM; break;
209 case X86II::MO_GOTTPOFF: RefKind = MCSymbolRefExpr::VK_GOTTPOFF; break;
210 case X86II::MO_INDNTPOFF: RefKind = MCSymbolRefExpr::VK_INDNTPOFF; break;
211 case X86II::MO_TPOFF: RefKind = MCSymbolRefExpr::VK_TPOFF; break;
212 case X86II::MO_DTPOFF: RefKind = MCSymbolRefExpr::VK_DTPOFF; break;
213 case X86II::MO_NTPOFF: RefKind = MCSymbolRefExpr::VK_NTPOFF; break;
214 case X86II::MO_GOTNTPOFF: RefKind = MCSymbolRefExpr::VK_GOTNTPOFF; break;
215 case X86II::MO_GOTPCREL: RefKind = MCSymbolRefExpr::VK_GOTPCREL; break;
216 case X86II::MO_GOT: RefKind = MCSymbolRefExpr::VK_GOT; break;
217 case X86II::MO_GOTOFF: RefKind = MCSymbolRefExpr::VK_GOTOFF; break;
218 case X86II::MO_PLT: RefKind = MCSymbolRefExpr::VK_PLT; break;
219 case X86II::MO_PIC_BASE_OFFSET:
220 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
280 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw
284 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl
288 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq
363 case MachineOperand::MO_Register:
368 case MachineOperand::MO_Immediate:
370 case MachineOperand::MO_MachineBasicBlock:
371 case MachineOperand::MO_GlobalAddress:
372 case MachineOperand::MO_ExternalSymbol:
374 case MachineOperand::MO_MCSymbol:
376 case MachineOperand::MO_JumpTableIndex:
378 case MachineOperand::MO_ConstantPoolIndex:
380 case MachineOperand::MO_BlockAddress:
383 case MachineOperand::MO_RegisterMask:
399 case X86::LEA64_32r:
400 case X86::LEA64r:
401 case X86::LEA16r:
402 case X86::LEA32r:
412 case X86::VMOVZPQILo2PQIrr:
413 case X86::VMOVAPDrr:
414 case X86::VMOVAPDYrr:
415 case X86::VMOVAPSrr:
416 case X86::VMOVAPSYrr:
417 case X86::VMOVDQArr:
418 case X86::VMOVDQAYrr:
419 case X86::VMOVDQUrr:
420 case X86::VMOVDQUYrr:
421 case X86::VMOVUPDrr:
422 case X86::VMOVUPDYrr:
423 case X86::VMOVUPSrr:
424 case X86::VMOVUPSYrr: {
430 case X86::VMOVZPQILo2PQIrr: NewOpc = X86::VMOVPQI2QIrr; break;
431 case X86::VMOVAPDrr: NewOpc = X86::VMOVAPDrr_REV; break;
432 case X86::VMOVAPDYrr: NewOpc = X86::VMOVAPDYrr_REV; break;
433 case X86::VMOVAPSrr: NewOpc = X86::VMOVAPSrr_REV; break;
434 case X86::VMOVAPSYrr: NewOpc = X86::VMOVAPSYrr_REV; break;
435 case X86::VMOVDQArr: NewOpc = X86::VMOVDQArr_REV; break;
436 case X86::VMOVDQAYrr: NewOpc = X86::VMOVDQAYrr_REV; break;
437 case X86::VMOVDQUrr: NewOpc = X86::VMOVDQUrr_REV; break;
438 case X86::VMOVDQUYrr: NewOpc = X86::VMOVDQUYrr_REV; break;
439 case X86::VMOVUPDrr: NewOpc = X86::VMOVUPDrr_REV; break;
440 case X86::VMOVUPDYrr: NewOpc = X86::VMOVUPDYrr_REV; break;
441 case X86::VMOVUPSrr: NewOpc = X86::VMOVUPSrr_REV; break;
442 case X86::VMOVUPSYrr: NewOpc = X86::VMOVUPSYrr_REV; break;
448 case X86::VMOVSDrr:
449 case X86::VMOVSSrr: {
455 case X86::VMOVSDrr: NewOpc = X86::VMOVSDrr_REV; break;
456 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV; break;
466 case X86::TAILJMPr64:
467 case X86::TAILJMPr64_REX:
468 case X86::CALL64r:
469 case X86::CALL64pcrel32: {
478 case X86::EH_RETURN:
479 case X86::EH_RETURN64: {
485 case X86::CLEANUPRET: {
492 case X86::CATCHRET: {
503 case X86::TAILJMPr:
504 case X86::TAILJMPd:
505 case X86::TAILJMPd64: {
509 case X86::TAILJMPr: Opcode = X86::JMP32r; break;
510 case X86::TAILJMPd:
511 case X86::TAILJMPd64: Opcode = X86::JMP_1; break;
521 case X86::DEC16r:
522 case X86::DEC32r:
523 case X86::INC16r:
524 case X86::INC32r:
530 case X86::DEC16r: Opcode = X86::DEC16r_alt; break;
531 case X86::DEC32r: Opcode = X86::DEC32r_alt; break;
532 case X86::INC16r: Opcode = X86::INC16r_alt; break;
533 case X86::INC32r: Opcode = X86::INC32r_alt; break;
540 // this with an ugly goto in case the resultant OR uses EAX and needs the
542 case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify;
543 case X86::ADD32rr_DB: OutMI.setOpcode(X86::OR32rr); goto ReSimplify;
544 case X86::ADD64rr_DB: OutMI.setOpcode(X86::OR64rr); goto ReSimplify;
545 case X86::ADD16ri_DB: OutMI.setOpcode(X86::OR16ri); goto ReSimplify;
546 case X86::ADD32ri_DB: OutMI.setOpcode(X86::OR32ri); goto ReSimplify;
547 case X86::ADD64ri32_DB: OutMI.setOpcode(X86::OR64ri32); goto ReSimplify;
548 case X86::ADD16ri8_DB: OutMI.setOpcode(X86::OR16ri8); goto ReSimplify;
549 case X86::ADD32ri8_DB: OutMI.setOpcode(X86::OR32ri8); goto ReSimplify;
550 case X86::ADD64ri8_DB: OutMI.setOpcode(X86::OR64ri8); goto ReSimplify;
555 case X86::ACQUIRE_MOV8rm: OutMI.setOpcode(X86::MOV8rm); goto ReSimplify;
556 case X86::ACQUIRE_MOV16rm: OutMI.setOpcode(X86::MOV16rm); goto ReSimplify;
557 case X86::ACQUIRE_MOV32rm: OutMI.setOpcode(X86::MOV32rm); goto ReSimplify;
558 case X86::ACQUIRE_MOV64rm: OutMI.setOpcode(X86::MOV64rm); goto ReSimplify;
559 case X86::RELEASE_MOV8mr: OutMI.setOpcode(X86::MOV8mr); goto ReSimplify;
560 case X86::RELEASE_MOV16mr: OutMI.setOpcode(X86::MOV16mr); goto ReSimplify;
561 case X86::RELEASE_MOV32mr: OutMI.setOpcode(X86::MOV32mr); goto ReSimplify;
562 case X86::RELEASE_MOV64mr: OutMI.setOpcode(X86::MOV64mr); goto ReSimplify;
563 case X86::RELEASE_MOV8mi: OutMI.setOpcode(X86::MOV8mi); goto ReSimplify;
564 case X86::RELEASE_MOV16mi: OutMI.setOpcode(X86::MOV16mi); goto ReSimplify;
565 case X86::RELEASE_MOV32mi: OutMI.setOpcode(X86::MOV32mi); goto ReSimplify;
566 case X86::RELEASE_MOV64mi32: OutMI.setOpcode(X86::MOV64mi32); goto ReSimplify;
567 case X86::RELEASE_ADD8mi: OutMI.setOpcode(X86::ADD8mi); goto ReSimplify;
568 case X86::RELEASE_ADD8mr: OutMI.setOpcode(X86::ADD8mr); goto ReSimplify;
569 case X86::RELEASE_ADD32mi: OutMI.setOpcode(X86::ADD32mi); goto ReSimplify;
570 case X86::RELEASE_ADD32mr: OutMI.setOpcode(X86::ADD32mr); goto ReSimplify;
571 case X86::RELEASE_ADD64mi32: OutMI.setOpcode(X86::ADD64mi32); goto ReSimplify;
572 case X86::RELEASE_ADD64mr: OutMI.setOpcode(X86::ADD64mr); goto ReSimplify;
573 case X86::RELEASE_AND8mi: OutMI.setOpcode(X86::AND8mi); goto ReSimplify;
574 case X86::RELEASE_AND8mr: OutMI.setOpcode(X86::AND8mr); goto ReSimplify;
575 case X86::RELEASE_AND32mi: OutMI.setOpcode(X86::AND32mi); goto ReSimplify;
576 case X86::RELEASE_AND32mr: OutMI.setOpcode(X86::AND32mr); goto ReSimplify;
577 case X86::RELEASE_AND64mi32: OutMI.setOpcode(X86::AND64mi32); goto ReSimplify;
578 case X86::RELEASE_AND64mr: OutMI.setOpcode(X86::AND64mr); goto ReSimplify;
579 case X86::RELEASE_OR8mi: OutMI.setOpcode(X86::OR8mi); goto ReSimplify;
580 case X86::RELEASE_OR8mr: OutMI.setOpcode(X86::OR8mr); goto ReSimplify;
581 case X86::RELEASE_OR32mi: OutMI.setOpcode(X86::OR32mi); goto ReSimplify;
582 case X86::RELEASE_OR32mr: OutMI.setOpcode(X86::OR32mr); goto ReSimplify;
583 case X86::RELEASE_OR64mi32: OutMI.setOpcode(X86::OR64mi32); goto ReSimplify;
584 case X86::RELEASE_OR64mr: OutMI.setOpcode(X86::OR64mr); goto ReSimplify;
585 case X86::RELEASE_XOR8mi: OutMI.setOpcode(X86::XOR8mi); goto ReSimplify;
586 case X86::RELEASE_XOR8mr: OutMI.setOpcode(X86::XOR8mr); goto ReSimplify;
587 case X86::RELEASE_XOR32mi: OutMI.setOpcode(X86::XOR32mi); goto ReSimplify;
588 case X86::RELEASE_XOR32mr: OutMI.setOpcode(X86::XOR32mr); goto ReSimplify;
589 case X86::RELEASE_XOR64mi32: OutMI.setOpcode(X86::XOR64mi32); goto ReSimplify;
590 case X86::RELEASE_XOR64mr: OutMI.setOpcode(X86::XOR64mr); goto ReSimplify;
591 case X86::RELEASE_INC8m: OutMI.setOpcode(X86::INC8m); goto ReSimplify;
592 case X86::RELEASE_INC16m: OutMI.setOpcode(X86::INC16m); goto ReSimplify;
593 case X86::RELEASE_INC32m: OutMI.setOpcode(X86::INC32m); goto ReSimplify;
594 case X86::RELEASE_INC64m: OutMI.setOpcode(X86::INC64m); goto ReSimplify;
595 case X86::RELEASE_DEC8m: OutMI.setOpcode(X86::DEC8m); goto ReSimplify;
596 case X86::RELEASE_DEC16m: OutMI.setOpcode(X86::DEC16m); goto ReSimplify;
597 case X86::RELEASE_DEC32m: OutMI.setOpcode(X86::DEC32m); goto ReSimplify;
598 case X86::RELEASE_DEC64m: OutMI.setOpcode(X86::DEC64m); goto ReSimplify;
607 case X86::MOV8mr_NOREX:
608 case X86::MOV8mr:
609 case X86::MOV8rm_NOREX:
610 case X86::MOV8rm:
611 case X86::MOV16mr:
612 case X86::MOV16rm:
613 case X86::MOV32mr:
614 case X86::MOV32rm: {
618 case X86::MOV8mr_NOREX:
619 case X86::MOV8mr: NewOpc = X86::MOV8o32a; break;
620 case X86::MOV8rm_NOREX:
621 case X86::MOV8rm: NewOpc = X86::MOV8ao32; break;
622 case X86::MOV16mr: NewOpc = X86::MOV16o32a; break;
623 case X86::MOV16rm: NewOpc = X86::MOV16ao32; break;
624 case X86::MOV32mr: NewOpc = X86::MOV32o32a; break;
625 case X86::MOV32rm: NewOpc = X86::MOV32ao32; break;
631 case X86::ADC8ri: case X86::ADC16ri: case X86::ADC32ri: case X86::ADC64ri32:
632 case X86::ADD8ri: case X86::ADD16ri: case X86::ADD32ri: case X86::ADD64ri32:
633 case X86::AND8ri: case X86::AND16ri: case X86::AND32ri: case X86::AND64ri32:
634 case X86::CMP8ri: case X86::CMP16ri: case X86::CMP32ri: case X86::CMP64ri32:
635 case X86::OR8ri: case X86::OR16ri: case X86::OR32ri: case X86::OR64ri32:
636 case X86::SBB8ri: case X86::SBB16ri: case X86::SBB32ri: case X86::SBB64ri32:
637 case X86::SUB8ri: case X86::SUB16ri: case X86::SUB32ri: case X86::SUB64ri32:
638 case X86::TEST8ri:case X86::TEST16ri:case X86::TEST32ri:case X86::TEST64ri32:
639 case X86::XOR8ri: case X86::XOR16ri: case X86::XOR32ri: case X86::XOR64ri32: {
643 case X86::ADC8ri: NewOpc = X86::ADC8i8; break;
644 case X86::ADC16ri: NewOpc = X86::ADC16i16; break;
645 case X86::ADC32ri: NewOpc = X86::ADC32i32; break;
646 case X86::ADC64ri32: NewOpc = X86::ADC64i32; break;
647 case X86::ADD8ri: NewOpc = X86::ADD8i8; break;
648 case X86::ADD16ri: NewOpc = X86::ADD16i16; break;
649 case X86::ADD32ri: NewOpc = X86::ADD32i32; break;
650 case X86::ADD64ri32: NewOpc = X86::ADD64i32; break;
651 case X86::AND8ri: NewOpc = X86::AND8i8; break;
652 case X86::AND16ri: NewOpc = X86::AND16i16; break;
653 case X86::AND32ri: NewOpc = X86::AND32i32; break;
654 case X86::AND64ri32: NewOpc = X86::AND64i32; break;
655 case X86::CMP8ri: NewOpc = X86::CMP8i8; break;
656 case X86::CMP16ri: NewOpc = X86::CMP16i16; break;
657 case X86::CMP32ri: NewOpc = X86::CMP32i32; break;
658 case X86::CMP64ri32: NewOpc = X86::CMP64i32; break;
659 case X86::OR8ri: NewOpc = X86::OR8i8; break;
660 case X86::OR16ri: NewOpc = X86::OR16i16; break;
661 case X86::OR32ri: NewOpc = X86::OR32i32; break;
662 case X86::OR64ri32: NewOpc = X86::OR64i32; break;
663 case X86::SBB8ri: NewOpc = X86::SBB8i8; break;
664 case X86::SBB16ri: NewOpc = X86::SBB16i16; break;
665 case X86::SBB32ri: NewOpc = X86::SBB32i32; break;
666 case X86::SBB64ri32: NewOpc = X86::SBB64i32; break;
667 case X86::SUB8ri: NewOpc = X86::SUB8i8; break;
668 case X86::SUB16ri: NewOpc = X86::SUB16i16; break;
669 case X86::SUB32ri: NewOpc = X86::SUB32i32; break;
670 case X86::SUB64ri32: NewOpc = X86::SUB64i32; break;
671 case X86::TEST8ri: NewOpc = X86::TEST8i8; break;
672 case X86::TEST16ri: NewOpc = X86::TEST16i16; break;
673 case X86::TEST32ri: NewOpc = X86::TEST32i32; break;
674 case X86::TEST64ri32: NewOpc = X86::TEST64i32; break;
675 case X86::XOR8ri: NewOpc = X86::XOR8i8; break;
676 case X86::XOR16ri: NewOpc = X86::XOR16i16; break;
677 case X86::XOR32ri: NewOpc = X86::XOR32i32; break;
678 case X86::XOR64ri32: NewOpc = X86::XOR64i32; break;
685 case X86::MOVSX16rr8:
686 case X86::MOVSX32rr16:
687 case X86::MOVSX64rr32:
708 case X86::TLS_addr32:
709 case X86::TLS_addr64:
712 case X86::TLS_base_addr32:
715 case X86::TLS_base_addr64:
785 case 0: llvm_unreachable("Zero nops?"); break;
786 case 1: NopSize = 1; Opc = X86::NOOP; break;
787 case 2: NopSize = 2; Opc = X86::XCHG16ar; break;
788 case 3: NopSize = 3; Opc = X86::NOOPL; break;
789 case 4: NopSize = 4; Opc = X86::NOOPL; Displacement = 8; break;
790 case 5: NopSize = 5; Opc = X86::NOOPL; Displacement = 8;
792 case 6: NopSize = 6; Opc = X86::NOOPW; Displacement = 8;
794 case 7: NopSize = 7; Opc = X86::NOOPL; Displacement = 512; break;
795 case 8: NopSize = 8; Opc = X86::NOOPL; Displacement = 512;
797 case 9: NopSize = 9; Opc = X86::NOOPW; Displacement = 512;
812 case X86::NOOP:
815 case X86::XCHG16ar:
818 case X86::NOOPL:
819 case X86::NOOPW:
858 case MachineOperand::MO_GlobalAddress:
859 case MachineOperand::MO_ExternalSymbol:
868 case MachineOperand::MO_Immediate:
876 case MachineOperand::MO_Register:
993 case MachineOperand::MO_Immediate:
997 case MachineOperand::MO_ExternalSymbol:
998 case MachineOperand::MO_GlobalAddress:
1225 case TargetOpcode::DBG_VALUE:
1229 case X86::Int_MemBarrier:
1234 case X86::EH_RETURN:
1235 case X86::EH_RETURN64: {
1242 case X86::CLEANUPRET: {
1248 case X86::CATCHRET: {
1254 case X86::TAILJMPr:
1255 case X86::TAILJMPm:
1256 case X86::TAILJMPd:
1257 case X86::TAILJMPr64:
1258 case X86::TAILJMPm64:
1259 case X86::TAILJMPd64:
1260 case X86::TAILJMPr64_REX:
1261 case X86::TAILJMPm64_REX:
1262 case X86::TAILJMPd64_REX:
1267 case X86::TLS_addr32:
1268 case X86::TLS_addr64:
1269 case X86::TLS_base_addr32:
1270 case X86::TLS_base_addr64:
1273 case X86::MOVPC32r: {
1314 case X86::ADD32ri: {
1346 case TargetOpcode::STATEPOINT:
1349 case TargetOpcode::FAULTING_LOAD_OP:
1352 case TargetOpcode::PATCHABLE_OP:
1355 case TargetOpcode::STACKMAP:
1358 case TargetOpcode::PATCHPOINT:
1361 case TargetOpcode::PATCHABLE_FUNCTION_ENTER:
1364 case TargetOpcode::PATCHABLE_RET:
1367 case X86::MORESTACK_RET:
1371 case X86::MORESTACK_RET_RESTORE_R10:
1379 case X86::SEH_PushReg:
1383 case X86::SEH_SaveReg:
1388 case X86::SEH_SaveXMM:
1393 case X86::SEH_StackAlloc:
1397 case X86::SEH_SetFrame:
1402 case X86::SEH_PushFrame:
1406 case X86::SEH_EndPrologue:
1410 case X86::SEH_Epilogue: {
1430 case X86::PSHUFBrm:
1431 case X86::VPSHUFBrm:
1432 case X86::VPSHUFBYrm:
1433 case X86::VPSHUFBZ128rm:
1434 case X86::VPSHUFBZ128rmk:
1435 case X86::VPSHUFBZ128rmkz:
1436 case X86::VPSHUFBZ256rm:
1437 case X86::VPSHUFBZ256rmk:
1438 case X86::VPSHUFBZ256rmkz:
1439 case X86::VPSHUFBZrm:
1440 case X86::VPSHUFBZrmk:
1441 case X86::VPSHUFBZrmkz: {
1447 case X86::PSHUFBrm:
1448 case X86::VPSHUFBrm:
1449 case X86::VPSHUFBYrm:
1450 case X86::VPSHUFBZ128rm:
1451 case X86::VPSHUFBZ256rm:
1452 case X86::VPSHUFBZrm:
1454 case X86::VPSHUFBZ128rmkz:
1455 case X86::VPSHUFBZ256rmkz:
1456 case X86::VPSHUFBZrmkz:
1458 case X86::VPSHUFBZ128rmk:
1459 case X86::VPSHUFBZ256rmk:
1460 case X86::VPSHUFBZrmk:
1479 case X86::VPERMILPDrm:
1480 case X86::VPERMILPDYrm:
1481 case X86::VPERMILPDZ128rm:
1482 case X86::VPERMILPDZ256rm:
1483 case X86::VPERMILPDZrm: {
1501 case X86::VPERMILPSrm:
1502 case X86::VPERMILPSYrm:
1503 case X86::VPERMILPSZ128rm:
1504 case X86::VPERMILPSZ256rm:
1505 case X86::VPERMILPSZrm: {
1523 case X86::VPERMIL2PDrm:
1524 case X86::VPERMIL2PSrm:
1525 case X86::VPERMIL2PDrmY:
1526 case X86::VPERMIL2PSrmY: {
1543 case X86::VPERMIL2PSrm: case X86::VPERMIL2PSrmY: ElSize = 32; break;
1544 case X86::VPERMIL2PDrm: case X86::VPERMIL2PDrmY: ElSize = 64; break;
1556 case X86::VPPERMrrm: {
1576 case X86::Prefix##MOVAPD##Suffix##rm: \
1577 case X86::Prefix##MOVAPS##Suffix##rm: \
1578 case X86::Prefix##MOVUPD##Suffix##rm: \
1579 case X86::Prefix##MOVUPS##Suffix##rm: \
1580 case X86::Prefix##MOVDQA##Suffix##rm: \
1581 case X86::Prefix##MOVDQU##Suffix##rm:
1584 case X86::VMOVDQA64##Suffix##rm: \
1585 case X86::VMOVDQA32##Suffix##rm: \
1586 case X86::VMOVDQU64##Suffix##rm: \
1587 case X86::VMOVDQU32##Suffix##rm: \
1588 case X86::VMOVDQU16##Suffix##rm: \
1589 case X86::VMOVDQU8##Suffix##rm: \
1590 case X86::VMOVAPS##Suffix##rm: \
1591 case X86::VMOVAPD##Suffix##rm: \
1592 case X86::VMOVUPS##Suffix##rm: \
1593 case X86::VMOVUPD##Suffix##rm:
