Lines Matching full:next
6 ; CHECK-NEXT: entry:
7 ; CHECK-NEXT: [[CONV:%.*]] = zext i16 %x to i32
8 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 %y, 1
9 ; CHECK-NEXT: [[D:%.*]] = lshr i32 [[CONV]], [[TMP0]]
10 ; CHECK-NEXT: ret i32 [[D]]
22 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 %y to i64
23 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 %x, [[TMP1]]
24 ; CHECK-NEXT: ret i64 [[TMP2]]
35 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 %y, 2
36 ; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
37 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 %x, [[TMP2]]
38 ; CHECK-NEXT: ret i64 [[TMP3]]
48 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %y, 5
49 ; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP1]], i32 5, i32 %y
50 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 %x, [[DOTV]]
51 ; CHECK-NEXT: ret i32 [[TMP2]]
62 ; CHECK-NEXT: [[DOTV:%.*]] = select i1 %x, i32 5, i32 6
63 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 %V, [[DOTV]]
64 ; CHECK-NEXT: [[TMP2:%.*]] = select i1 %y, i32 [[TMP1]], i32 0
65 ; CHECK-NEXT: ret i32 [[TMP2]]
76 ; CHECK-NEXT: [[X_IS_ZERO:%.*]] = icmp eq i32 %x, 0
77 ; CHECK-NEXT: [[DIVISOR:%.*]] = select i1 [[X_IS_ZERO]], i32 1, i32 %x
78 ; CHECK-NEXT: [[Y:%.*]] = udiv i32 %z, [[DIVISOR]]
79 ; CHECK-NEXT: ret i32 [[Y]]
