Lines Matching full:next
25 ; CHECK-NEXT: %t7 = icmp eq i64 %t4, 0
27 ; CHECK-NEXT: [[SCEVGEP:%[^ ]+]] = getelementptr i8, i8* undef, i64 %t4
28 ; CHECK-NEXT: br label %bb14
35 ; CHECK-NEXT: store i8 undef, i8* [[SCEVGEP]]
36 ; CHECK-NEXT: %t6 = load float*, float** undef
38 ; CHECK-NEXT: [[SCEVGEP1:%[^ ]+]] = getelementptr float, float* %t6, i64 4
39 ; CHECK-NEXT: [[SCEVGEP2:%[^ ]+]] = bitcast float* [[SCEVGEP1]] to i8*
41 ; CHECK-NEXT: [[ADDRESS:%[^ ]+]] = getelementptr i8, i8* [[SCEVGEP2]], i64 %t4
42 ; CHECK-NEXT: store i8 undef, i8* [[ADDRESS]]
43 ; CHECK-NEXT: br label %bb14
61 ; CHECK-NEXT: [[PHIIV:%[^ ]+]] = phi i32 [ [[IVNEXT:%[^ ]+]], %loop0 ], [ -2, %bb ]
62 ; CHECK-NEXT: [[IVNEXT]] = add nuw nsw i32 [[PHIIV]], 1
63 ; CHECK-NEXT: br i1 false, label %loop0, label %bb0
65 %i0 = phi i32 [ %i0.next, %loop0 ], [ 0, %bb ] ; <i32> [#uses=2]
66 %i0.next = add i32 %i0, 1 ; <i32> [#uses=1]
73 ; CHECK-NEXT: %i1 = phi i32 [ 0, %bb0 ], [ %i1.next, %bb5 ]
77 ; CHECK-NEXT: br i1 false, label %bb2, label %[[LOOP1BB6:.+]]
79 %i1 = phi i32 [ 0, %bb0 ], [ %i1.next, %bb5 ] ; <i32> [#uses=4]
85 ; CHECK-NEXT: br i1 true, label %[[BB2BB6:[^,]+]], label %bb5
90 ; CHECK-NEXT: %i1.next = add i32 %i1, 1
91 ; CHECK-NEXT: br i1 true, label %[[BB5BB6:[^,]+]], label %loop1
93 %i1.next = add i32 %i1, 1 ; <i32> [#uses=1]
98 ; CHECK-NEXT: [[INITIALVAL:%[^ ]+]] = add i32 [[IVNEXT]], %i1.next
99 ; CHECK-NEXT: br label %[[SPLITTOBB6:.+]]
103 ; CHECK-NEXT: br label %[[SPLITTOBB6]]
107 ; CHECK-NEXT: [[INITP8:%[^ ]+]] = phi i32 [ [[INITIALVAL]], %[[BB5BB6]] ], [ undef, %[[BB2BB6]] ]
108 ; CHECK-NEXT: [[INITP9:%[^ ]+]] = phi i32 [ undef, %[[BB5BB6]] ], [ %i1, %[[BB2BB6]] ]
109 ; CHECK-NEXT: br label %bb6
112 ; CHECK-NEXT: br label %bb6
115 ; CHECK-NEXT: %p8 = phi i32 [ undef, %[[LOOP1BB6]] ], [ [[INITP8]], %[[SPLITTOBB6]] ]
116 ; CHECK-NEXT: %p9 = phi i32 [ %i1, %[[LOOP1BB6]] ], [ [[INITP9]], %[[SPLITTOBB6]] ]
117 ; CHECK-NEXT: unreachable
