Lines Matching full:next
16 ; CHECK-NEXT: %[[DYNPTR:.*]] = alloca i8*
17 ; CHECK-NEXT: store i8* %[[SP]], i8** %[[DYNPTR]]
19 ; CHECK-NEXT: %[[ZEXT:.*]] = zext i32 %[[ARG]] to i64
20 ; CHECK-NEXT: %[[MUL:.*]] = mul i64 %[[ZEXT]], 4
21 ; CHECK-NEXT: %[[SP2:.*]] = load i8*, i8** @__safestack_unsafe_stack_ptr
22 ; CHECK-NEXT: %[[PTRTOINT:.*]] = ptrtoint i8* %[[SP2]] to i64
23 ; CHECK-NEXT: %[[SUB:.*]] = sub i64 %[[PTRTOINT]], %[[MUL]]
24 ; CHECK-NEXT: %[[AND:.*]] = and i64 %[[SUB]], -16
25 ; CHECK-NEXT: %[[INTTOPTR:.*]] = inttoptr i64 %[[AND]] to i8*
26 ; CHECK-NEXT: store i8* %[[INTTOPTR]], i8** @__safestack_unsafe_stack_ptr
27 ; CHECK-NEXT: store i8* %[[INTTOPTR]], i8** %unsafe_stack_dynamic_ptr
28 ; CHECK-NEXT: %[[ALLOCA:.*]] = bitcast i8* %[[INTTOPTR]] to i32*
32 ; CHECK-NEXT: %[[LOAD:.*]] = load i8*, i8** %[[DYNPTR]]
33 ; CHECK-NEXT: store i8* %[[LOAD]], i8** @__safestack_unsafe_stack_ptr
38 ; CHECK-NEXT: store i8* %[[SP:.*]], i8** @__safestack_unsafe_stack_ptr