Lines Matching full:info
43 tgsi_scan_shader(fp.pipe.tokens, &fp.info);
57 tgsi_scan_shader(vp.pipe.tokens, &vp.info);
78 dummy_assign_slots(struct nv50_ir_prog_info *info)
83 for (i = 0; i < info->numInputs; ++i) {
85 if (info->in[i].mask & (1 << c))
86 info->in[i].slot[c] = n++;
90 if (info->io.vertexId < info->numSysVals)
91 info->sv[info->io.vertexId].slot[0] = n++;
92 if (info->io.instanceId < info->numSysVals)
93 info->sv[info->io.instanceId].slot[0] = n++;
96 for (i = 0; i < info->numOutputs; ++i) {
98 if (info->out[i].mask & (1 << c))
99 info->out[i].slot[c] = n++;
107 struct nv50_ir_prog_info info = {0};
110 info.type = type;
111 info.target = chipset;
112 info.bin.sourceRep = NV50_PROGRAM_IR_TGSI;
113 info.bin.source = tokens;
115 info.io.auxCBSlot = 15;
116 info.io.ucpBase = NV50_CB_AUX_UCP_OFFSET;
117 info.io.suInfoBase = NV50_CB_AUX_TEX_MS_OFFSET;
118 info.io.msInfoCBSlot = 15;
119 info.io.msInfoBase = NV50_CB_AUX_MS_OFFSET;
121 info.assignSlots = dummy_assign_slots;
123 info.optLevel = debug_get_num_option("NV50_PROG_OPTIMIZE", 3);
124 info.dbgFlags = debug_get_num_option("NV50_PROG_DEBUG", 0);
126 ret = nv50_ir_generate_code(&info);
132 *size = info.bin.codeSize;
133 *code = info.bin.code;
