Home | History | Annotate | Download | only in radeonsi

Lines Matching full:shader

29 /* How linking shader inputs and outputs between vertex, tessellation, and
48 * For example, a shader only writing GENERIC0 has the output stride of 5.
63 * where per-vertex and per-patch data start, is passed to the shader via
236 /* For VS shader key fix_fetch. */
254 /* State of the context creating the shader object. */
267 /* A shader selector is a gallium CSO and contains shader variants and
279 /* The compiled TGSI shader expecting a prolog and/or epilog (not
322 /* Valid shader configurations:
333 /* Common VS bits between the shader key and the prolog key. */
338 /* Common VS bits between the shader key and the epilog key. */
343 /* Common TCS bits between the shader key and the epilog key. */
352 /* Common PS bits between the shader key and the prolog key. */
365 /* Common PS bits between the shader key and the epilog key. */
427 } tcs; /* tessellation control shader */
430 } tes; /* tessellation evaluation shader */
439 unsigned as_es:1; /* export shader */
440 unsigned as_ls:1; /* local shader */
490 /* GCN-specific shader info. */
526 /* Shader key + LLVM IR + disassembly + statistics.
548 struct si_shader *shader,
552 struct si_shader *shader,
562 void si_shader_destroy(struct si_shader *shader);
565 int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
566 void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
572 struct si_shader *shader,