Lines Matching refs:hwtnl
50 struct svga_hwtnl *hwtnl = CALLOC_STRUCT(svga_hwtnl);
51 if (!hwtnl)
54 hwtnl->svga = svga;
56 hwtnl->cmd.swc = svga->swc;
58 return hwtnl;
66 svga_hwtnl_destroy(struct svga_hwtnl *hwtnl)
72 pipe_resource_reference(&hwtnl->index_cache[i][j].buffer, NULL);
76 for (i = 0; i < hwtnl->cmd.vbuf_count; i++)
77 pipe_resource_reference(&hwtnl->cmd.vbufs[i].buffer, NULL);
79 for (i = 0; i < hwtnl->cmd.prim_count; i++)
80 pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
82 FREE(hwtnl);
87 svga_hwtnl_set_flatshade(struct svga_hwtnl *hwtnl,
90 struct svga_screen *svgascreen = svga_screen(hwtnl->svga->pipe.screen);
93 hwtnl->api_pv = (flatshade && !flatshade_first) ? PV_LAST : PV_FIRST;
98 hwtnl->hw_pv = hwtnl->api_pv;
102 hwtnl->hw_pv = PV_FIRST;
108 svga_hwtnl_set_fillmode(struct svga_hwtnl *hwtnl, unsigned mode)
110 hwtnl->api_fillmode = mode;
115 svga_hwtnl_vertex_decls(struct svga_hwtnl *hwtnl,
121 assert(hwtnl->cmd.prim_count == 0);
122 hwtnl->cmd.vdecl_count = count;
123 hwtnl->cmd.vdecl_layout_id = layout_id;
124 memcpy(hwtnl->cmd.vdecl, decls, count * sizeof(*decls));
125 memcpy(hwtnl->cmd.vdecl_buffer_index, buffer_indexes,
134 svga_hwtnl_vertex_buffers(struct svga_hwtnl *hwtnl,
137 util_set_vertex_buffers_count(hwtnl->cmd.vbufs,
138 &hwtnl->cmd.vbuf_count, buffers, 0, count);
147 svga_hwtnl_is_buffer_referred(struct svga_hwtnl *hwtnl,
156 if (!hwtnl->cmd.prim_count) {
160 for (i = 0; i < hwtnl->cmd.vbuf_count; ++i) {
161 if (hwtnl->cmd.vbufs[i].buffer == buffer) {
166 for (i = 0; i < hwtnl->cmd.prim_count; ++i) {
167 if (hwtnl->cmd.prim_ib[i] == buffer) {
177 draw_vgpu9(struct svga_hwtnl *hwtnl)
179 struct svga_winsys_context *swc = hwtnl->cmd.swc;
180 struct svga_context *svga = hwtnl->svga;
189 for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
190 unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
191 handle = svga_buffer_handle(svga, hwtnl->cmd.vbufs[j].buffer);
198 for (i = 0; i < hwtnl->cmd.prim_count; i++) {
199 if (hwtnl->cmd.prim_ib[i]) {
200 handle = svga_buffer_handle(svga, hwtnl->cmd.prim_ib[i]);
241 hwtnl->cmd.prim_count);
245 hwtnl->cmd.vdecl_count,
246 &prim, hwtnl->cmd.prim_count);
251 hwtnl->cmd.vdecl,
252 hwtnl->cmd.vdecl_count * sizeof hwtnl->cmd.vdecl[0]);
254 for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
263 if (hwtnl->cmd.prim_count == 1) {
264 vdecl[i].rangeHint.first = hwtnl->cmd.min_index[0];
265 vdecl[i].rangeHint.last = hwtnl->cmd.max_index[0] + 1;
278 hwtnl->cmd.prim, hwtnl->cmd.prim_count * sizeof hwtnl->cmd.prim[0]);
280 for (i = 0; i < hwtnl->cmd.prim_count; i++) {
284 pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
289 hwtnl->cmd.prim_count = 0;
457 draw_vgpu10(struct svga_hwtnl *hwtnl,
464 struct svga_context *svga = hwtnl->svga;
468 const unsigned vbuf_count = hwtnl->cmd.vbuf_count;
474 assert(hwtnl->cmd.prim_count == 0);
512 struct svga_buffer *sbuf = svga_buffer(hwtnl->cmd.vbufs[i].buffer);
549 if (svga->state.hw_draw.layout_id != hwtnl->cmd.vdecl_layout_id) {
551 hwtnl->cmd.vdecl_layout_id);
555 svga->state.hw_draw.layout_id = hwtnl->cmd.vdecl_layout_id;
563 vbuffer_attrs[i].stride = hwtnl->cmd.vbufs[i].stride;
564 vbuffer_attrs[i].offset = hwtnl->cmd.vbufs[i].buffer_offset;
571 if (((hwtnl->cmd.swc->hints & SVGA_HINT_FLAG_CAN_PRE_FLUSH) == 0) ||
717 hwtnl->cmd.prim_count = 0;
732 svga_hwtnl_flush(struct svga_hwtnl *hwtnl)
736 SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLFLUSH);
738 if (!svga_have_vgpu10(hwtnl->svga) && hwtnl->cmd.prim_count) {
740 ret = draw_vgpu9(hwtnl);
743 SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws);
749 svga_hwtnl_set_index_bias(struct svga_hwtnl *hwtnl, int index_bias)
751 hwtnl->index_bias = index_bias;
764 check_draw_params(struct svga_hwtnl *hwtnl,
771 assert(!svga_have_vgpu10(hwtnl->svga));
773 for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
774 unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
775 const struct pipe_vertex_buffer *vb = &hwtnl->cmd.vbufs[j];
777 unsigned offset = hwtnl->cmd.vdecl[i].array.offset;
778 unsigned stride = hwtnl->cmd.vdecl[i].array.stride;
779 int index_bias = (int) range->indexBias + hwtnl->index_bias;
794 switch (hwtnl->cmd.vdecl[i].identity.type) {
909 svga_hwtnl_prim(struct svga_hwtnl *hwtnl,
918 SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLPRIM);
920 if (svga_have_vgpu10(hwtnl->svga)) {
922 ret = draw_vgpu10(hwtnl, range, vcount, min_index, max_index, ib,
925 svga_context_flush(hwtnl->svga, NULL);
926 ret = draw_vgpu10(hwtnl, range, vcount, min_index, max_index, ib,
934 check_draw_params(hwtnl, range, min_index, max_index, ib);
941 if (hwtnl->cmd.prim_count + 1 >= QSZ) {
942 ret = svga_hwtnl_flush(hwtnl);
948 hwtnl->cmd.min_index[hwtnl->cmd.prim_count] = min_index;
949 hwtnl->cmd.max_index[hwtnl->cmd.prim_count] = max_index;
951 hwtnl->cmd.prim[hwtnl->cmd.prim_count] = *range;
952 hwtnl->cmd.prim[hwtnl->cmd.prim_count].indexBias += hwtnl->index_bias;
954 pipe_resource_reference(&hwtnl->cmd.prim_ib[hwtnl->cmd.prim_count], ib);
955 hwtnl->cmd.prim_count++;
959 SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws);
