Lines Matching refs:cfg
70 setup_l3_config(struct brw_context *brw, const struct gen_l3_config *cfg)
72 const bool has_dc = cfg->n[GEN_L3P_DC] || cfg->n[GEN_L3P_ALL];
73 const bool has_is = cfg->n[GEN_L3P_IS] || cfg->n[GEN_L3P_RO] ||
74 cfg->n[GEN_L3P_ALL];
75 const bool has_c = cfg->n[GEN_L3P_C] || cfg->n[GEN_L3P_RO] ||
76 cfg->n[GEN_L3P_ALL];
77 const bool has_t = cfg->n[GEN_L3P_T] || cfg->n[GEN_L3P_RO] ||
78 cfg->n[GEN_L3P_ALL];
79 const bool has_slm = cfg->n[GEN_L3P_SLM];
120 assert(!cfg->n[GEN_L3P_IS] && !cfg->n[GEN_L3P_C] && !cfg->n[GEN_L3P_T]);
128 SET_FIELD(cfg->n[GEN_L3P_URB], GEN8_L3CNTLREG_URB_ALLOC) |
129 SET_FIELD(cfg->n[GEN_L3P_RO], GEN8_L3CNTLREG_RO_ALLOC) |
130 SET_FIELD(cfg->n[GEN_L3P_DC], GEN8_L3CNTLREG_DC_ALLOC) |
131 SET_FIELD(cfg->n[GEN_L3P_ALL], GEN8_L3CNTLREG_ALL_ALLOC));
136 assert(!cfg->n[GEN_L3P_ALL]);
144 assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]);
148 assert(cfg->n[GEN_L3P_URB] >= n0_urb);
166 SET_FIELD(cfg->n[GEN_L3P_URB] - n0_urb, GEN7_L3CNTLREG2_URB_ALLOC) |
168 SET_FIELD(cfg->n[GEN_L3P_ALL], GEN7_L3CNTLREG2_ALL_ALLOC) |
169 SET_FIELD(cfg->n[GEN_L3P_RO], GEN7_L3CNTLREG2_RO_ALLOC) |
170 SET_FIELD(cfg->n[GEN_L3P_DC], GEN7_L3CNTLREG2_DC_ALLOC));
172 OUT_BATCH(SET_FIELD(cfg->n[GEN_L3P_IS], GEN7_L3CNTLREG3_IS_ALLOC) |
173 SET_FIELD(cfg->n[GEN_L3P_C], GEN7_L3CNTLREG3_C_ALLOC) |
174 SET_FIELD(cfg->n[GEN_L3P_T], GEN7_L3CNTLREG3_T_ALLOC));
199 update_urb_size(struct brw_context *brw, const struct gen_l3_config *cfg)
202 const unsigned sz = gen_get_l3_config_urb_size(devinfo, cfg);
233 const struct gen_l3_config *const cfg =
236 setup_l3_config(brw, cfg);
237 update_urb_size(brw, cfg);
238 brw->l3.config = cfg;
242 gen_dump_l3_config(cfg, stderr);
297 const struct gen_l3_config *const cfg = gen_get_default_l3_config(devinfo);
299 if (cfg != brw->l3.config &&
301 setup_l3_config(brw, cfg);
302 update_urb_size(brw, cfg);
303 brw->l3.config = cfg;
