Lines Matching refs:cube
580 ALLOC_STATE_IDX( cube[0], cube0_mm, CUBE_STATE_SIZE, "CUBE/cube-0", 0, 0 );
581 ALLOC_STATE_IDX( cube[1], cube1_mm, CUBE_STATE_SIZE, "CUBE/cube-1", 0, 1 );
582 ALLOC_STATE_IDX( cube[2], cube2_mm, CUBE_STATE_SIZE, "CUBE/cube-2", 0, 2 );
584 rmesa->hw.cube[i].emit = cube_emit_cs;
610 rmesa->hw.cube[0].cmd[CUBE_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_FACES_0);
611 rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T0);
612 rmesa->hw.cube[1].cmd[CUBE_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_FACES_1);
613 rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T1);
614 rmesa->hw.cube[2].cmd[CUBE_CMD_0] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_FACES_2);
615 rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T2);
818 rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
819 rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_0] =
821 rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_1] =
823 cube[i].cmd[CUBE_PP_CUBIC_OFFSET_2] =
825 rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_3] =
827 rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_4] =
