Lines Matching defs:temp1
32 #define prepareToBitInterleaving(low, high, temp, temp0, temp1) \
38 temp1 = (high); \
39 temp = (temp1 ^ (temp1 >> 1)) & 0x22222222UL; temp1 = temp1 ^ temp ^ (temp << 1); \
40 temp = (temp1 ^ (temp1 >> 2)) & 0x0C0C0C0CUL; temp1 = temp1 ^ temp ^ (temp << 2); \
41 temp = (temp1 ^ (temp1 >> 4)) & 0x00F000F0UL; temp1 = temp1 ^ temp ^ (temp << 4); \
42 temp = (temp1 ^ (temp1 >> 8)) & 0x0000FF00UL; temp1 = temp1 ^ temp ^ (temp << 8);
44 #define toBitInterleavingAndXOR(low, high, even, odd, temp, temp0, temp1) \
45 prepareToBitInterleaving(low, high, temp, temp0, temp1) \
46 even ^= (temp0 & 0x0000FFFF) | (temp1 << 16); \
47 odd ^= (temp0 >> 16) | (temp1 & 0xFFFF0000);
49 #define toBitInterleavingAndAND(low, high, even, odd, temp, temp0, temp1) \
50 prepareToBitInterleaving(low, high, temp, temp0, temp1) \
51 even &= (temp0 & 0x0000FFFF) | (temp1 << 16); \
52 odd &= (temp0 >> 16) | (temp1 & 0xFFFF0000);
54 #define toBitInterleavingAndSet(low, high, even, odd, temp, temp0, temp1) \
55 prepareToBitInterleaving(low, high, temp, temp0, temp1) \
56 even = (temp0 & 0x0000FFFF) | (temp1 << 16); \
57 odd = (temp0 >> 16) | (temp1 & 0xFFFF0000);
61 #define prepareFromBitInterleaving(even, odd, temp, temp0, temp1) \
63 temp1 = (odd); \
64 temp = (temp0 & 0x0000FFFF) | (temp1 << 16); \
65 temp1 = (temp0 >> 16) | (temp1 & 0xFFFF0000); \
71 temp = (temp1 ^ (temp1 >> 8)) & 0x0000FF00UL; temp1 = temp1 ^ temp ^ (temp << 8); \
72 temp = (temp1 ^ (temp1 >> 4)) & 0x00F000F0UL; temp1 = temp1 ^ temp ^ (temp << 4); \
73 temp = (temp1 ^ (temp1 >> 2)) & 0x0C0C0C0CUL; temp1 = temp1 ^ temp ^ (temp << 2); \
74 temp = (temp1 ^ (temp1 >> 1)) & 0x22222222UL; temp1 = temp1 ^ temp ^ (temp << 1);
76 #define fromBitInterleaving(even, odd, low, high, temp, temp0, temp1) \
77 prepareFromBitInterleaving(even, odd, temp, temp0, temp1) \
79 high = temp1;
81 #define fromBitInterleavingAndXOR(even, odd, lowIn, highIn, lowOut, highOut, temp, temp0, temp1) \
82 prepareFromBitInterleaving(even, odd, temp, temp0, temp1) \
84 highOut = highIn ^ temp1;
90 UINT32 temp, temp0, temp1;
109 toBitInterleavingAndAND(low, high, stateAsHalfLanes[lanePosition*2+0], stateAsHalfLanes[lanePosition*2+1], temp, temp0, temp1);
126 UINT32 temp, temp0, temp1;
137 toBitInterleavingAndXOR(low, high, stateAsHalfLanes[lanePosition*2+0], stateAsHalfLanes[lanePosition*2+1], temp, temp0, temp1);
146 UINT32 temp, temp0, temp1;
164 toBitInterleavingAndXOR(low, high, stateAsHalfLanes[lanePosition*2+0], stateAsHalfLanes[lanePosition*2+1], temp, temp0, temp1);
191 UINT32 low, high, temp, temp0, temp1;
203 toBitInterleavingAndXOR(low, high, stateAsHalfLanes[lanePosition*2+0], stateAsHalfLanes[lanePosition*2+1], temp, temp0, temp1);
247 UINT32 low, high, temp, temp0, temp1;
259 toBitInterleavingAndSet(low, high, stateAsHalfLanes[lanePosition*2+0], stateAsHalfLanes[lanePosition*2+1], temp, temp0, temp1);
291 UINT32 low, high, temp, temp0, temp1;
294 fromBitInterleaving(stateAsHalfLanes[lanePosition*2], stateAsHalfLanes[lanePosition*2+1], low, high, temp, temp0, temp1);
335 UINT32 low, high, temp, temp0, temp1;
337 fromBitInterleaving(stateAsHalfLanes[lanePosition*2], stateAsHalfLanes[lanePosition*2+1], low, high, temp, temp0, temp1);
363 UINT32 low, high, temp, temp0, temp1;
367 fromBitInterleaving(stateAsHalfLanes[lanePosition*2], stateAsHalfLanes[lanePosition*2+1], low, high, temp, temp0, temp1);
410 UINT32 low, high, temp, temp0, temp1;
412 fromBitInterleaving(stateAsHalfLanes[lanePosition*2], stateAsHalfLanes[lanePosition*2+1], low, high, temp, temp0, temp1);
