Lines Matching full:uaddr2
60 int *uaddr2, unsigned long val3, int rc, const char *func, int line)
67 # define CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, \
72 (uaddr2), (val3)); \
80 (unsigned long) (timeout), (int *) (uaddr2), \
84 # define CHECK_FUTEX_ENOSYS(uaddr, op, val, timeout, uaddr2, val3, check) \
85 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 1)
87 # define CHECK_FUTEX(uaddr, op, val, timeout, uaddr2, val3, check) \
88 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 0)
174 TAIL_ALLOC_OBJECT_CONST_PTR(int, uaddr2);
180 uaddr2[0] = 0xbadf00d;
192 * 5. uaddr2 - not used
197 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
204 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
211 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3,
220 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
229 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
238 /* uaddr is not as provided; uaddr2 is faulty but ignored */
239 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3,
245 /* uaddr is not as provided; uaddr2 is faulty but ignored */
247 uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
258 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
266 VAL, tmout, uaddr2, 0, (rc == -1) && (errno == EAGAIN));
280 * 5. uaddr2 - not used
284 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1,
293 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, 0,
301 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
311 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
320 tmout, uaddr2 + 1, 0, (rc == -1) && (errno == EINVAL));
327 FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, VAL3,
341 * 5. uaddr2 - not used
369 * 5. uaddr2 - not used
399 * 5. uaddr2 - not used
416 /* FUTEX_REQUEUE - wake val processes and re-queue rest on uaddr2
422 * 5. uaddr2 - another futex address, to re-queue waiting processes on
427 CHECK_FUTEX(uaddr, FUTEX_REQUEUE, VAL, VAL2, uaddr2, VAL3,
430 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
432 CHECK_FUTEX(uaddr, FUTEX_REQUEUE, VALP, VAL2P, uaddr2, VAL3,
435 uaddr, VALP_PR, VAL2P_PR, uaddr2, sprintrc(rc));
439 uaddr2, VAL3, (rc == 0) || ((rc == -1) && (errno == EINVAL)));
441 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
444 VAL2P, uaddr2, VAL3, (rc == 0));
446 uaddr, VALP_PR, VAL2P_PR, uaddr2, sprintrc(rc));
451 uaddr2
458 * 5. uaddr2 - another futex address, to re-queue waiting processes on
463 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, VAL3,
466 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
468 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VALP, VAL2P, uaddr2, VAL3,
471 uaddr, VALP_PR, VAL2P_PR, uaddr2, VAL3_PR, sprintrc(rc));
474 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, *uaddr,
477 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
479 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VALP, VAL2P, uaddr2, *uaddr,
482 uaddr, VALP_PR, VAL2P_PR, uaddr2, *uaddr, sprintrc(rc));
486 VAL2, uaddr2, *uaddr,
489 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
492 VAL2P, uaddr2, *uaddr, (rc == 0));
494 uaddr, VALP_PR, VAL2P_PR, uaddr2, *uaddr, sprintrc(rc));
500 * wake val2 processes waiting for uaddr2 in case
501 * operation encoded in val3 (change of value at uaddr2
503 * constant) succeedes with value at uaddr2. Operation
504 * result is written to value of uaddr2 (in any case).
510 * 5. uaddr2 - another futex address, for conditional wake of
517 * uaddr2. Values available (from 2005 up to
520 * applied to the old value stored in uaddr2
527 * uaddr2 is compared.
591 VAL, i, uaddr2, wake_ops[i].val,
605 i, uaddr2, wake_ops[i].str, sprintrc(rc));
625 * 5. uaddr2 - not used
631 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_LOCK_PI, VAL, tmout, uaddr2 + 1,
638 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
658 * 5. uaddr2 - not used
662 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_UNLOCK_PI, VAL, tmout, uaddr2 + 1,
667 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
680 * 5. uaddr2 - not used
684 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_TRYLOCK_PI, VAL, tmout, uaddr2 + 1,
689 VAL, tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
706 * 5. uaddr2 - (PI-aware) futex address to requeue process on
712 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2,
717 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
720 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
724 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
727 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
731 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
734 FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2, VAL3,
739 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
748 * 5. uaddr2 - (PI-aware) futex address, to re-queue waiting processes
757 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2, VAL3,
760 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
762 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2,
765 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
768 VAL, VAL2, uaddr2, *uaddr, (rc == -1) && (errno == EINVAL));
770 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
779 CHECK_FUTEX(uaddr, 0xd, VAL, tmout + 1, uaddr2 + 1, VAL3,
782 uaddr, VAL_PR, tmout + 1, uaddr2 + 1, VAL3_PR, sprintrc(rc));
784 CHECK_FUTEX(uaddr, 0xbefeeded, VAL, tmout + 1, uaddr2, VAL3,
787 uaddr, VAL_PR, tmout + 1, uaddr2, VAL3_PR, sprintrc(rc));
