Lines Matching refs:cur
253 LiveInterval *hasNextReloadInterval(LiveInterval *cur);
263 void assignRegOrStackSlotAtInterval(LiveInterval* cur);
273 void findIntervalsToSpill(LiveInterval *cur,
285 unsigned attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg);
352 unsigned getFreePhysReg(LiveInterval* cur);
353 unsigned getFreePhysReg(LiveInterval* cur,
447 unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) {
448 unsigned Preference = vrm_->getRegAllocPref(cur.reg);
449 if ((Preference && Preference == Reg) || !cur.containsOneValue())
453 if (cur.ranges.size() != 1)
456 const LiveRange &range = cur.ranges.front();
470 CopyMI->isCopy() && cur.reg == CopyMI->getOperand(1).getReg())
489 const TargetRegisterClass *RC = mri_->getRegClass(cur.reg);
493 if (li_->conflictsWithPhysReg(cur, *vrm_, CandReg))
497 DEBUG(dbgs() << "Coalescing: " << cur << " -> " << tri_->getName(CandReg)
499 vrm_->clearVirt(cur.reg);
500 vrm_->assignVirt2Phys(cur.reg, CandReg);
598 LiveInterval* cur = unhandled_.top();
601 DEBUG(dbgs() << "\n*** CURRENT ***: " << *cur << '\n');
603 assert(!cur->empty() && "Empty interval in unhandled set.");
605 processActiveIntervals(cur->beginIndex());
606 processInactiveIntervals(cur->beginIndex());
608 assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
614 assignRegOrStackSlotAtInterval(cur);
646 LiveInterval &cur = *i->second;
648 bool isPhys = TargetRegisterInfo::isPhysicalRegister(cur.reg);
650 Reg = cur.reg;
651 else if (vrm_->isAssignedReg(cur.reg))
652 Reg = attemptTrivialCoalescing(cur, vrm_->getPhys(cur.reg));
656 if (!isPhys && vrm_->getPreSplitReg(cur.reg))
659 for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end();
822 /// getConflictWeight - Return the number of conflicts between cur
825 float getConflictWeight(LiveInterval *cur, unsigned Reg, LiveIntervals *li_,
832 if (cur->liveAt(li_->getInstructionIndex(MI))) {
844 void RALinScan::findIntervalsToSpill(LiveInterval *cur,
850 // the one that has fewest defs and uses that conflict with cur.
865 if (!cur->overlapsFrom(*i->first, i->second))
871 Conflicts[j] += getConflictWeight(cur, Reg, li_, mri_, loopInfo);
880 if (!cur->overlapsFrom(*i->first, i->second-1))
886 Conflicts[j] += getConflictWeight(cur, Reg, li_, mri_, loopInfo);
931 LiveInterval *RALinScan::hasNextReloadInterval(LiveInterval *cur) {
932 DenseMap<unsigned, unsigned>::iterator I = NextReloadMap.find(cur->reg);
966 void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) {
967 const TargetRegisterClass *RC = mri_->getRegClass(cur->reg);
972 if (cur->empty()) {
973 unsigned physReg = vrm_->getRegAllocPref(cur->reg);
978 vrm_->assignVirt2Phys(cur->reg, physReg);
985 SlotIndex StartPosition = cur->beginIndex();
993 if (!vrm_->getRegAllocPref(cur->reg) && cur->hasAtLeastOneValue()) {
994 VNInfo *vni = cur->begin()->valno;
1012 mri_->setRegAllocationHint(cur->reg, 0, Reg);
1029 cur->overlapsFrom(*i->first, i->second-1)) {
1041 unsigned physReg = getFreePhysReg(cur);
1063 if (cur->overlapsFrom(*I, II)) {
1088 if (cur->overlapsFrom(*I, II)) {
1098 physReg = getFreePhysReg(cur);
1112 vrm_->assignVirt2Phys(cur->reg, physReg);
1114 active_.push_back(std::make_pair(cur, cur->begin()));
1115 handled_.push_back(cur);
1120 tri_->avoidWriteAfterWrite(mri_->getRegClass(cur->reg)))
1125 if (LiveInterval *NextReloadLI = hasNextReloadInterval(cur)) {
1129 DowngradeRegister(cur, physReg);
1151 DEBUG(dbgs() << "\tassigning stack slot at interval "<< *cur << ":\n");
1188 if (cur->weight == HUGE_VALF ||
1189 li_->getApproximateInstructionCount(*cur) == 0) {
1191 if (li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_)) {
1202 assignRegOrStackSlotAtInterval(cur);
1230 if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
1231 DEBUG(dbgs() << "\t\t\tspilling(c): " << *cur << '\n');
1233 LiveRangeEdit LRE(*cur, added);
1277 unhandled_.push(cur);
1288 findIntervalsToSpill(cur, RegsWeights, LastCandidate, spillIs);
1381 HI->expiredAt(cur->beginIndex())) {
1419 unsigned RALinScan::getFreePhysReg(LiveInterval* cur,
1427 std::pair<unsigned, unsigned> Hint = mri_->getRegAllocationHint(cur->reg);
1499 unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
1503 const TargetRegisterClass *RC = mri_->getRegClass(cur->reg);
1526 unsigned Preference = vrm_->getRegAllocPref(cur->reg);
1534 unsigned FreeReg = getFreePhysReg(cur, RC, MaxInactiveCount, inactiveCounts,
1538 return getFreePhysReg(cur, RC, MaxInactiveCount, inactiveCounts, false);
