Lines Matching refs:TargetMIPS32
35 return ::Ice::MIPS32::TargetMIPS32::create(Func);
49 ::Ice::MIPS32::TargetMIPS32::staticInit(Ctx);
53 return ::Ice::MIPS32::TargetMIPS32::shouldBePooled(C);
57 return ::Ice::MIPS32::TargetMIPS32::getPointerType();
112 TargetMIPS32::TargetMIPS32(Cfg *Func)
115 void TargetMIPS32::assignVarStackSlots(VarList &SortedSpilledVariables,
144 void TargetMIPS32::staticInit(GlobalContext *Ctx) {
208 void TargetMIPS32::unsetIfNonLeafFunc() {
220 uint32_t TargetMIPS32::getStackAlignment() const {
224 uint32_t TargetMIPS32::getCallStackArgumentsSizeBytes(const InstCall *Call) {
225 TargetMIPS32::CallingConv CC;
265 void TargetMIPS32::genTargetHelperCallFor(Inst *Instr) {
843 void TargetMIPS32::findMaxStackOutArgsSize() {
864 void TargetMIPS32::translateO2() {
975 void TargetMIPS32::translateOm1() {
1029 bool TargetMIPS32::doBranchOpt(Inst *Instr, const CfgNode *NextNode) {
1053 const char *TargetMIPS32::getRegName(RegNumT RegNum, Type Ty) const {
1058 Variable *TargetMIPS32::getPhysicalRegister(RegNumT RegNum, Type Ty) {
1079 void TargetMIPS32::emitJumpTable(const Cfg *Func,
1087 Variable *TargetMIPS32::legalizeToReg(Operand *From, RegNumT RegNum) {
1092 Operand *TargetMIPS32::legalizeUndef(Operand *From, RegNumT RegNum) {
1122 Variable *TargetMIPS32::makeReg(Type Type, RegNumT RegNum) {
1133 OperandMIPS32Mem *TargetMIPS32::formMemoryOperand(Operand *Operand, Type Ty) {
1152 void TargetMIPS32::emitVariable(const Variable *Var) const {
1172 TargetMIPS32::CallingConv::CallingConv()
1184 bool TargetMIPS32::CallingConv::argInReg(Type Ty, uint32_t ArgNo,
1203 bool TargetMIPS32::CallingConv::argInGPR(Type Ty, RegNumT *Reg) {
1265 inline void TargetMIPS32::CallingConv::discardNextGPRAndItsAliases(
1271 inline void TargetMIPS32::CallingConv::alignGPR(CfgVector<RegNumT> *Regs) {
1281 void TargetMIPS32::CallingConv::discardUnavailableGPRsAndTheirAliases(
1288 bool TargetMIPS32::CallingConv::argInVFP(Type Ty, RegNumT *Reg) {
1335 void TargetMIPS32::CallingConv::discardUnavailableVFPRegsAndTheirAliases(
1342 void TargetMIPS32::lowerArguments() {
1344 TargetMIPS32::CallingConv CC;
1429 Type TargetMIPS32::stackSlotType() { return IceType_i32; }
1439 void TargetMIPS32::finishArgumentLowering(Variable *Arg, bool PartialOnStack,
1496 void TargetMIPS32::addProlog(CfgNode *Node) {
1688 TargetMIPS32::CallingConv CC;
1749 void TargetMIPS32::addEpilog(CfgNode *Node) {
1813 Variable *TargetMIPS32::PostLoweringLegalizer::newBaseRegister(
1838 void TargetMIPS32::PostLoweringLegalizer::legalizeMovFp(
1871 void TargetMIPS32::PostLoweringLegalizer::legalizeMov(InstMIPS32Mov *MovInstr) {
2121 TargetMIPS32::PostLoweringLegalizer::legalizeMemOperand(OperandMIPS32Mem *Mem) {
2149 Variable *TargetMIPS32::PostLoweringLegalizer::legalizeImmediate(int32_t Imm) {
2167 void TargetMIPS32::postLowerLegalization() {
2245 Operand *TargetMIPS32::loOperand(Operand *Operand) {
2263 Operand *TargetMIPS32::getOperandAtIndex(Operand *Operand, Type BaseType,
2299 Operand *TargetMIPS32::hiOperand(Operand *Operand) {
2341 SmallBitVector TargetMIPS32::getRegisterSet(RegSetMask Include,
2376 void TargetMIPS32::lowerAlloca(const InstAlloca *Instr) {
2465 void TargetMIPS32::lowerInt64Arithmetic(const InstArithmetic *Instr,
2750 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Instr) {
3049 void TargetMIPS32::lowerAssign(const InstAssign *Instr) {
3101 void TargetMIPS32::lowerBr(const InstBr *Instr) {
3354 void TargetMIPS32::lowerCall(const InstCall *Instr) {
3359 TargetMIPS32::CallingConv CC;
3640 void TargetMIPS32::lowerCast(const InstCast *Instr) {
3908 void TargetMIPS32::lowerExtractElement(const InstExtractElement *Instr) {
3972 void TargetMIPS32::lowerFcmp(const InstFcmp *Instr) {
4167 void TargetMIPS32::lower64Icmp(const InstIcmp *Instr) {
4313 void TargetMIPS32::lowerIcmp(const InstIcmp *Instr) {
4421 void TargetMIPS32::lowerInsertElement(const InstInsertElement *Instr) {
4538 void TargetMIPS32::createArithInst(Intrinsics::AtomicRMWOperation Operation,
4564 void TargetMIPS32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
5209 void TargetMIPS32::lowerLoad(const InstLoad *Instr) {
5362 OperandMIPS32Mem *TargetMIPS32::formAddressingMode(Type Ty, Cfg *Func,
5435 void TargetMIPS32::doAddressOptLoad() {
5447 void TargetMIPS32::randomlyInsertNop(float Probability,
5455 void TargetMIPS32::lowerPhi(const InstPhi * /*Instr*/) {
5459 void TargetMIPS32::lowerRet(const InstRet *Instr) {
5540 void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
5599 void TargetMIPS32::lowerShuffleVector(const InstShuffleVector *Instr) {
5603 void TargetMIPS32::lowerStore(const InstStore *Instr) {
5629 void TargetMIPS32::doAddressOptStore() {
5641 void TargetMIPS32::lowerSwitch(const InstSwitch *Instr) {
5676 void TargetMIPS32::lowerBreakpoint(const InstBreakpoint *Instr) {
5680 void TargetMIPS32::lowerUnreachable(const InstUnreachable *) {
5685 void TargetMIPS32::lowerOther(const Inst *Instr) {
5696 void TargetMIPS32::prelowerPhis() {
5697 PhiLowering::prelowerPhis32Bit<TargetMIPS32>(this, Context.getNode(), Func);
5700 void TargetMIPS32::postLower() {
5707 void TargetMIPS32::makeRandomRegisterPermutation(
5872 Variable *TargetMIPS32::copyToReg(Operand *Src, RegNumT RegNum) {
5887 Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed,
6040 void TargetMIPS32::ComputationTracker::recordProducers(CfgNode *Node) {
6114 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
6115 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
6116 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
6118 TargetMIPS32::Sandboxer::Sandboxer(TargetMIPS32 *Target,
6122 TargetMIPS32::Sandboxer::~Sandboxer() {}
6124 void TargetMIPS32::Sandboxer::createAutoBundle() {
6128 void TargetMIPS32::Sandboxer::addiu_sp(uint32_t StackOffset) {
6141 void TargetMIPS32::Sandboxer::lw(Variable *Dest, OperandMIPS32Mem *Mem) {
6158 void TargetMIPS32::Sandboxer::ll(Variable *Dest, OperandMIPS32Mem *Mem) {
6174 void TargetMIPS32::Sandboxer::sc(Variable *Dest, OperandMIPS32Mem *Mem) {
6185 void TargetMIPS32::Sandboxer::sw(Variable *Dest, OperandMIPS32Mem *Mem) {
6196 void TargetMIPS32::Sandboxer::lwc1(Variable *Dest, OperandMIPS32Mem *Mem,
6213 void TargetMIPS32::Sandboxer::ldc1(Variable *Dest, OperandMIPS32Mem *Mem,
6230 void TargetMIPS32::Sandboxer::ret(Variable *RetAddr, Variable *RetValue) {
6241 void TargetMIPS32::Sandboxer::reset_sp(Variable *Src) {
6255 InstMIPS32Call *TargetMIPS32::Sandboxer::jal(Variable *ReturnReg,
