Lines Matching full:dst1
143 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \
146 "(" #Index ", " #IndexValue ", " #Dst0 ", " #Dst1 ", " #Dst2 \
153 __ lea(IceType_i32, GPRRegister::Encoded_Reg_##Dst1, \
166 ASSERT_EQ((test.Index() << Traits::TIMES_2) + (Disp), test.Dst1()) \
176 Dst1, Dst2, Dst3) \
180 ", " #Dst1 ", " #Dst2 ", " #Dst3 ")"; \
195 __ lea(IceType_i32, GPRRegister::Encoded_Reg_##Dst1, \
217 test.Dst1()) \
678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \
684 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \
688 __ mov(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
696 __ Inst1(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
708 ASSERT_EQ(Expected1, test.Dst1()) << TestString << ": 1"; \
712 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \
717 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \
725 __ mov(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
729 __ Inst1(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
743 ASSERT_EQ(Expected1, test.Dst1()) << TestString << ": 1"; \
747 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \
752 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \
756 __ mov(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
760 __ Inst1(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst1, \
772 ASSERT_EQ(Expected1, test.Dst1()) << TestString << ": 1"; \
842 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \
845 TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \
847 TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \
848 TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \
853 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \
855 TestImplOp(add, adc, Dst0, Dst1, Value0, Src0, Src1, Value1, +, Size); \
856 TestImplOp(sub, sbb, Dst0, Dst1, Value0, Src0, Src1, Value1, -, Size); \
859 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \
861 TestImplValues(Dst0, Dst1, 0xFFFFFFFFFFFFFF00ull, Src0, Src1, \
865 #define TestImpl(Dst0, Dst1, Src0, Src1) \
868 GPRRegister::Encoded_Reg_##Dst1 <= 3 && \
871 TestImplSize(Dst0, Dst1, Src0, Src1, 8); \
873 TestImplSize(Dst0, Dst1, Src0, Src1, 16); \
874 TestImplSize(Dst0, Dst1, Src0, Src1, 32); \
