Lines Matching refs:u32
59 static inline u32 br32(const struct b44_private *bp, u32 reg)
65 static inline void bw32(const struct b44_private *bp, u32 reg, u32 val)
71 static inline void bflush(const struct b44_private *bp, u32 reg, u32 timeout)
102 static u32 pending_tx_index(struct b44_private *bp)
104 u32 pending = br32(bp, B44_DMATX_STAT);
116 static u32 pending_rx_index(struct b44_private *bp)
118 u32 pending = br32(bp, B44_DMARX_STAT);
129 static int b44_wait_bit(struct b44_private *bp, unsigned long reg, u32 bit,
135 u32 val = br32(bp, reg);
164 static inline u32 ssb_get_core_rev(struct b44_private *bp)
177 static u32 ssb_pci_setup(struct b44_private *bp, u32 cores)
179 u32 bar_orig, pci_rev, val;
220 u32 val;
221 const u32 mask = (SBTMSLOW_CLOCK | SBTMSLOW_FGC | SBTMSLOW_RESET);
298 u32 val = br32(bp, B44_DEVCTRL);
337 u32 val;
379 static void b44_populate_rx_descriptor(struct b44_private *bp, u32 idx)
382 u32 ctrl, addr;
404 static void b44_rx_refill(struct b44_private *bp, u32 pending)
406 u32 i;
426 u32 i;
486 static int b44_phy_read(struct b44_private *bp, int reg, u32 * val)
490 u32 arg1 = (MDIO_OP_READ << MDIO_DATA_OP_SHIFT);
491 u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
492 u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
493 u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
494 u32 argv = arg1 | arg2 | arg3 | arg4;
505 static int b44_phy_write(struct b44_private *bp, int reg, u32 val)
507 u32 arg1 = (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT);
508 u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
509 u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
510 u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
511 u32 arg5 = (val & MDIO_DATA_DATA);
512 u32 argv = arg1 | arg2 | arg3 | arg4 | arg5;
523 u32 val;
549 u32 val;
551 val = ((u32) data[2]) << 24;
552 val |= ((u32) data[3]) << 16;
553 val |= ((u32) data[4]) << 8;
554 val |= ((u32) data[5]) << 0;
559 (((u32) data[0]) << 8) | (((u32) data[1]) << 0));
572 u32 val;
613 u32 val;
785 u32 cur = bp->tx_cur;
786 u32 ctrl;
824 u32 cur, i;
845 u32 pending, i;
901 u32 istat;
