Lines Matching refs:u32
219 u32 op_own;
222 u32 size_vlan;
223 u32 flags;
226 u32 reserved;
230 u32 count;
232 u32 mem_type;
234 u32 addr_h;
235 u32 addr_l;
246 u32 reserved2[3];
255 u32 count;
259 u32 size; /* REMOVE ____cacheline_aligned_in_smp; *//* number of Rx descs or TXBBs */
260 u32 size_mask;
263 u32 prod;
264 u32 cons; /* holds the last consumed index */
267 u32 buf_size; /* ring buffer size in bytes */
274 u32 db_offset;
289 u32 rss_hash;
290 u32 reserved2;
299 u32 byte_cnt;
309 u32 update_ci;
310 u32 cmd_ci;
315 u32 size; /* number of CQEs in CQ */
316 u32 last; /* number of CQEs consumed */
323 u32 offset_ind;
326 u32 buf_size; /* ring size in bytes */
342 u32 reserved4;
353 u32 size; /* number of EQEs in ring */
354 u32 buf_size; /* EQ size in bytes */
368 u32 num;
369 u32 *buf;
373 u32 size;
381 u32 tbit;
386 u32 reserved1[5];
387 u32 send_db;
388 u32 reserved2[2];
389 u32 cq_arm;
390 u32 cq_ci;
406 u32 *eq_db;
420 u32 mem_type_snoop_be;
421 u32 txcq_db_offset;
422 u32 eq_db_offset;
441 u32 poll_counter;
473 u32 in_param_l;
474 u32 input_modifier;
475 u32 out_param_h;
476 u32 out_param_l;
477 u32 token;
479 u32 status_go_opcode;
498 u32 reserved3[4];
500 u32 reserved4[2];
502 u32 err_buf_size;
510 u32 reserved2;
517 u32 mkey_entry; /* mem key entries for each key*/
546 u32 enph_gpf; /* Enable PseudoHeader and GeneratePauseFrames flags */
547 u32 reserved;
552 u32 flags; /* several flags */
554 u32 reserved;
572 u32 reserved2;
579 u32 reserved2;
584 u32 state; /* if 1 the port state should be up */
586 u32 reserved;
602 u32 db_record_addr_h; /*physical address of CQ doorbell record */
603 u32 db_record_addr_l; /*physical address of CQ doorbell record */
604 u32 page_address[0]; /* 64 bit page addresses of CQ buffer */
620 u32 db_record_addr_h;
621 u32 db_record_addr_l;
622 u32 page_address[0];/* Array of 2^size 64b page descriptor addresses */
641 u32 mac_31_0; /* UCAST MAC Address bits 31:0 */
655 u32 page_address[0]; /* 64 bit page addresses of descriptor buffer. */
670 u32 page_address[0]; /* 64 bit page addresses of EQ buffer */
686 u32 reserved3;
705 u32 dev_config_space[64];
