Lines Matching defs:imm
161 void MacroAssembler::Mov(const Register& rd, uint64_t imm) {
163 DCHECK(is_uint32(imm) || is_int32(imm) || rd.Is64Bits());
185 if (!TryOneInstrMoveImmediate(rd, imm)) {
188 // Generic immediate case. Imm will be represented by
189 // [imm3, imm2, imm1, imm0], where each imm is 16 bits.
197 if (CountClearHalfWords(~imm, reg_size) >
198 CountClearHalfWords(imm, reg_size)) {
213 uint64_t imm16 = (imm >> (16 * i)) & 0xffffL;
320 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) {
324 if ((imm & 0xffff) == 0) {
327 imm >>= 16;
335 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) {
337 return CountClearHalfWords(imm, reg_size) >= ((reg_size / 16) - 1);
343 bool MacroAssembler::IsImmMovn(uint64_t imm, unsigned reg_size) {
344 return IsImmMovz(~imm, reg_size);
388 int64_t imm = operand.ImmediateValue();
390 if (imm == 0) {
392 } else if (imm == 1) {
394 } else if (imm == -1) {
399 Mov(temp, imm);
416 int64_t imm) {
419 if (IsImmMovz(imm, reg_size) && !dst.IsSP()) {
422 movz(dst, imm);
424 } else if (IsImmMovn(imm, reg_size) && !dst.IsSP()) {
427 movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask));
429 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) {
439 int64_t imm) {
443 if (TryOneInstrMoveImmediate(dst, imm)) {
447 int shift_low = CountTrailingZeros(imm, reg_size);
448 int64_t imm_low = imm >> shift_low;
455 int shift_high = CountLeadingZeros(imm, reg_size);
456 int64_t imm_high = (imm << shift_high) | ((1 << shift_high) - 1);
468 Mov(dst, imm);
1959 uint64_t imm = reinterpret_cast<uint64_t>(target);
1961 DCHECK(((imm >> 48) & 0xffff) == 0);
1962 movz(temp, (imm >> 0) & 0xffff, 0);
1963 movk(temp, (imm >> 16) & 0xffff, 16);
1964 movk(temp, (imm >> 32) & 0xffff, 32);
