Lines Matching refs:OutputRegister
328 __ asm_instr(i.OutputRegister()); \
383 __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
386 __ asm_instr(i.OutputRegister(), i.InputOperand(0), \
391 __ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
393 __ asm_instr(i.OutputRegister(), i.InputOperand(1)); \
403 __ asm_instr(i.OutputRegister(), Immediate(i.InputInt##width(1))); \
409 __ asm_instr##_cl(i.OutputRegister()); \
420 __ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
422 __ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
424 __ asm_instr(i.OutputRegister(), i.InputOperand(0)); \
515 auto result = i.OutputRegister(); \
941 __ movq(i.OutputRegister(), rsp);
944 __ movq(i.OutputRegister(), rbp);
948 __ movq(i.OutputRegister(), Operand(rbp, 0));
950 __ movq(i.OutputRegister(), rbp);
954 auto result = i.OutputRegister();
994 __ leaq(i.OutputRegister(), Operand(base, offset.offset()));
1193 __ Lzcntq(i.OutputRegister(), i.InputRegister(0));
1195 __ Lzcntq(i.OutputRegister(), i.InputOperand(0));
1200 __ Lzcntl(i.OutputRegister(), i.InputRegister(0));
1202 __ Lzcntl(i.OutputRegister(), i.InputOperand(0));
1207 __ Tzcntq(i.OutputRegister(), i.InputRegister(0));
1209 __ Tzcntq(i.OutputRegister(), i.InputOperand(0));
1214 __ Tzcntl(i.OutputRegister(), i.InputRegister(0));
1216 __ Tzcntl(i.OutputRegister(), i.InputOperand(0));
1221 __ Popcntq(i.OutputRegister(), i.InputRegister(0));
1223 __ Popcntq(i.OutputRegister(), i.InputOperand(0));
1228 __ Popcntl(i.OutputRegister(), i.InputRegister(0));
1230 __ Popcntl(i.OutputRegister(), i.InputOperand(0));
1280 __ Cvttss2si(i.OutputRegister(), i.InputDoubleRegister(0));
1282 __ Cvttss2si(i.OutputRegister(), i.InputOperand(0));
1287 __ Cvttss2siq(i.OutputRegister(), i.InputDoubleRegister(0));
1289 __ Cvttss2siq(i.OutputRegister(), i.InputOperand(0));
1490 __ Cvttsd2si(i.OutputRegister(), i.InputDoubleRegister(0));
1492 __ Cvttsd2si(i.OutputRegister(), i.InputOperand(0));
1497 __ Cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
1499 __ Cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
1502 __ AssertZeroExtended(i.OutputRegister());
1508 __ Cvttss2siq(i.OutputRegister(), i.InputDoubleRegister(0));
1510 __ Cvttss2siq(i.OutputRegister(), i.InputOperand(0));
1513 __ Set(i.OutputRegister(1), 1);
1526 __ cmpq(i.OutputRegister(0), Immediate(1));
1531 __ Set(i.OutputRegister(1), 0);
1537 __ Cvttsd2siq(i.OutputRegister(0), i.InputDoubleRegister(0));
1539 __ Cvttsd2siq(i.OutputRegister(0), i.InputOperand(0));
1542 __ Set(i.OutputRegister(1), 1);
1555 __ cmpq(i.OutputRegister(0), Immediate(1));
1560 __ Set(i.OutputRegister(1), 0);
1568 __ Set(i.OutputRegister(1), 0);
1573 __ Cvttss2siq(i.OutputRegister(), i.InputDoubleRegister(0));
1575 __ Cvttss2siq(i.OutputRegister(), i.InputOperand(0));
1579 __ testq(i.OutputRegister(), i.OutputRegister());
1590 __ Cvttss2siq(i.OutputRegister(), kScratchDoubleReg);
1591 __ testq(i.OutputRegister(), i.OutputRegister());
1599 __ orq(i.OutputRegister(), kScratchRegister);
1602 __ Set(i.OutputRegister(1), 1);
1611 __ Set(i.OutputRegister(1), 0);
1616 __ Cvttsd2siq(i.OutputRegister(), i.InputDoubleRegister(0));
1618 __ Cvttsd2siq(i.OutputRegister(), i.InputOperand(0));
1622 __ testq(i.OutputRegister(), i.OutputRegister());
1633 __ Cvttsd2siq(i.OutputRegister(), kScratchDoubleReg);
1634 __ testq(i.OutputRegister(), i.OutputRegister());
1642 __ orq(i.OutputRegister(), kScratchRegister);
1645 __ Set(i.OutputRegister(1), 1);
1714 __ movl(i.OutputRegister(), i.InputOperand(0));
1716 __ Movd(i.OutputRegister(), i.InputDoubleRegister(0));
1721 __ movl(i.OutputRegister(), i.InputOperand(0, kDoubleSize / 2));
1723 __ Pextrd(i.OutputRegister(), i.InputDoubleRegister(0), 1);
1859 __ AssertZeroExtended(i.OutputRegister());
1865 __ AssertZeroExtended(i.OutputRegister());
1876 __ AssertZeroExtended(i.OutputRegister());
1894 __ AssertZeroExtended(i.OutputRegister());
1900 __ AssertZeroExtended(i.OutputRegister());
1911 __ AssertZeroExtended(i.OutputRegister());
1931 __ movl(i.OutputRegister(), i.InputRegister(0));
1933 __ movl(i.OutputRegister(), i.InputOperand(0));
1936 __ movl(i.OutputRegister(), i.MemoryOperand());
1938 __ AssertZeroExtended(i.OutputRegister());
1958 __ movq(i.OutputRegister(), i.MemoryOperand());
1993 __ movl(i.OutputRegister(), i.InputOperand(0));
1995 __ Movd(i.OutputRegister(), i.InputDoubleRegister(0));
2000 __ movq(i.OutputRegister(), i.InputOperand(0));
2002 __ Movq(i.OutputRegister(), i.InputDoubleRegister(0));
2024 if (i.InputRegister(0).is(i.OutputRegister())) {
2028 __ addl(i.OutputRegister(), Immediate(constant_summand));
2030 __ subl(i.OutputRegister(), Immediate(-constant_summand));
2033 if (i.InputRegister(1).is(i.OutputRegister())) {
2034 __ shll(i.OutputRegister(), Immediate(1));
2036 __ addl(i.OutputRegister(), i.InputRegister(1));
2039 __ shll(i.OutputRegister(), Immediate(1));
2041 __ shll(i.OutputRegister(), Immediate(2));
2043 __ shll(i.OutputRegister(), Immediate(3));
2045 __ leal(i.OutputRegister(), i.MemoryOperand());
2048 i.InputRegister(1).is(i.OutputRegister())) {
2049 __ addl(i.OutputRegister(), i.InputRegister(0));
2051 __ leal(i.OutputRegister(), i.MemoryOperand());
2053 __ AssertZeroExtended(i.OutputRegister());
2061 if (i.InputRegister(0).is(i.OutputRegister())) {
2065 __ addq(i.OutputRegister(), Immediate(constant_summand));
2067 __ subq(i.OutputRegister(), Immediate(-constant_summand));
2070 if (i.InputRegister(1).is(i.OutputRegister())) {
2071 __ shlq(i.OutputRegister(), Immediate(1));
2073 __ addq(i.OutputRegister(), i.InputRegister(1));
2076 __ shlq(i.OutputRegister(), Immediate(1));
2078 __ shlq(i.OutputRegister(), Immediate(2));
2080 __ shlq(i.OutputRegister(), Immediate(3));
2082 __ leaq(i.OutputRegister(), i.MemoryOperand());
2085 i.InputRegister(1).is(i.OutputRegister())) {
2086 __ addq(i.OutputRegister(), i.InputRegister(0));
2088 __ leaq(i.OutputRegister(), i.MemoryOperand());
2093 __ decl(i.OutputRegister());
2096 __ incl(i.OutputRegister());
2166 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
2386 Register reg = i.OutputRegister(instr->OutputCount() - 1);
