Lines Matching full:special
23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
579 (opcode == SPECIAL && rt_field == 0 &&
597 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
599 return GetOpcodeField(instr) == SPECIAL &&
606 return GetOpcodeField(instr) == SPECIAL &&
636 // to avoid use of mips ssnop and ehb special encodings
640 bool ret = (opcode == SPECIAL && function == SLL &&
1540 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);
1565 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);
1587 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU);
1597 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SUBU);
1605 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, MUL_MUH);
1612 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, MUL_MUH_U);
1618 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, MUL_MUH);
1624 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, MUL_MUH_U);
1630 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, DIV_MOD);
1636 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, DIV_MOD_U);
1641 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT);
1646 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU);
1651 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV);
1657 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, DIV_MOD);
1662 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
1668 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, DIV_MOD_U);
1675 GenInstrRegister(SPECIAL, rs, rt, rd, 0, AND);
1686 GenInstrRegister(SPECIAL, rs, rt, rd, 0, OR);
1697 GenInstrRegister(SPECIAL, rs, rt, rd, 0, XOR);
1708 GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
1722 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SLL);
1727 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
1732 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRL);
1737 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV);
1742 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRA);
1747 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV);
1755 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1765 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1775 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
2011 Instr break_instr = SPECIAL | BREAK | (code << 6);
2024 // On MIPS stop() is just a special kind of break_().
2037 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
2045 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
2054 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2062 SPECIAL | TLTU | rs.code() << kRsShift
2071 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2079 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2084 Instr sync_instr = SPECIAL | SYNC;
2091 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI);
2096 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO);
2102 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLT);
2107 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLTU);
2123 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ);
2128 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN);
2135 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
2142 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
2148 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SELEQZ_S);
2158 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, CLZ_R6);
2398 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SELNEZ_S);
