Lines Matching full:special
23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
556 (opcode == SPECIAL && rt_field == 0 &&
574 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
579 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
608 // to avoid use of mips ssnop and ehb special encodings
612 bool ret = (opcode == SPECIAL && function == SLL &&
1546 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR);
1564 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR);
1586 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU);
1596 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SUBU);
1602 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, MUL_MUH);
1611 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, MUL_MUH);
1617 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, MUL_MUH_U);
1623 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, MUL_MUH_U);
1629 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, D_MUL_MUH);
1635 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, D_MUL_MUH);
1641 GenInstrRegister(SPECIAL, rs, rt, rd, MUL_OP, D_MUL_MUH_U);
1647 GenInstrRegister(SPECIAL, rs, rt, rd, MUH_OP, D_MUL_MUH_U);
1653 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT);
1659 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU);
1669 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV);
1675 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, DIV_MOD);
1681 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, DIV_MOD);
1686 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
1692 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, DIV_MOD_U);
1698 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, DIV_MOD_U);
1703 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DADDU);
1708 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSUBU);
1713 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DMULT);
1718 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DMULTU);
1723 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DDIV);
1729 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, D_DIV_MOD);
1735 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, D_DIV_MOD);
1740 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DDIVU);
1746 GenInstrRegister(SPECIAL, rs, rt, rd, DIV_OP, D_DIV_MOD_U);
1752 GenInstrRegister(SPECIAL, rs, rt, rd, MOD_OP, D_DIV_MOD_U);
1759 GenInstrRegister(SPECIAL, rs, rt, rd, 0, AND);
1770 GenInstrRegister(SPECIAL, rs, rt, rd, 0, OR);
1781 GenInstrRegister(SPECIAL, rs, rt, rd, 0, XOR);
1792 GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
1806 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SLL);
1811 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
1816 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRL);
1821 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV);
1826 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, SRA);
1831 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRAV);
1839 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1849 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1856 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSLL);
1861 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSLLV);
1866 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSRL);
1871 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSRLV);
1877 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1884 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) |
1891 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1898 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSRA);
1903 GenInstrRegister(SPECIAL, rs, rt, rd, 0, DSRAV);
1908 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSLL32);
1913 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSRL32);
1918 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa & 0x1F, DSRA32);
1926 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
1936 Instr instr = SPECIAL | rs.code() << kRsShift | rt.code() << kRtShift |
2263 Instr break_instr = SPECIAL | BREAK | (code << 6);
2276 // On MIPS stop() is just a special kind of break_().
2289 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
2297 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
2306 SPECIAL | TLT | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2314 SPECIAL | TLTU | rs.code() << kRsShift
2323 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2331 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6;
2336 Instr sync_instr = SPECIAL | SYNC;
2343 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI);
2348 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO);
2354 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLT);
2359 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLTU);
2375 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVZ);
2380 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVN);
2387 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
2394 GenInstrRegister(SPECIAL, rs, rt, rd, 0, MOVCI);
2457 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SELEQZ_S);
2464 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SELNEZ_S);
2474 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, CLZ_R6);
2484 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, DCLZ_R6);
