Lines Matching refs:instr_
2022 int32_t func = instr_.FunctionFieldRaw();
2023 uint32_t code = (func == BREAK) ? instr_.Bits(25, 6) : -1;
2025 if (instr_.InstructionBits() == rtCallRedirInstr) {
2026 Redirection* redirection = Redirection::FromSwiInstruction(instr_.instr());
2252 HandleStop(code, instr_.instr());
2500 cc = instr_.FCccValue();
2502 switch (instr_.FunctionFieldRaw()) {
2851 if (instr_.Bit(16)) { // Read Tf bit.
2872 ft = (instr_.FunctionFieldRaw() != MOVF) ? get_fpu_register_double(ft_reg())
2875 cc = instr_.FCccValue();
2879 switch (instr_.FunctionFieldRaw()) {
2947 if (instr_.Bit(16)) { // Read Tf bit.
3244 switch (instr_.FunctionFieldRaw()) {
3336 switch (instr_.FunctionFieldRaw()) {
3425 switch (instr_.RsFieldRaw()) {
3492 switch (instr_.FunctionFieldRaw()) {
3541 switch (instr_.FunctionFieldRaw()) {
3787 instr_.FunctionFieldRaw() == DIV ? INT_MIN : LONG_MIN;
3862 switch (instr_.SaValue()) {
3984 uint32_t cc = instr_.FBccValue();
3986 if (instr_.Bit(16)) { // Read Tf bit.
4009 switch (instr_.FunctionFieldRaw()) {
4038 switch (instr_.FunctionFieldRaw()) {
4107 int32_t sa = instr_.SaFieldRaw() >> kSaShift;
4185 const uint8_t bp2 = instr_.Bp2Value();
4210 int32_t sa = instr_.SaFieldRaw() >> kSaShift;
4284 const uint8_t bp3 = instr_.Bp3Value();
4315 switch (instr_.OpcodeFieldRaw()) {
4343 Opcode op = instr_.OpcodeFieldRaw();
4344 int32_t rs_reg = instr_.RsValue();
4345 int64_t rs = get_register(instr_.RsValue());
4347 int32_t rt_reg = instr_.RtValue(); // Destination register.
4349 int16_t imm16 = instr_.Imm16Value();
4350 int32_t imm18 = instr_.Imm18Value();
4352 int32_t ft_reg = instr_.FtValue(); // Destination register.
4382 int16_t imm16 = instr_.Imm16Value();
4395 int16_t imm16 = instr_.Imm16Value();
4406 int32_t imm = instr_.ImmValue(bits);
4418 int32_t imm = instr_.ImmValue(bits);
4428 switch (instr_.RsFieldRaw()) {
4430 uint32_t cc = instr_.FBccValue();
4433 bool do_branch = (instr_.FBtrueValue()) ? cc_value : !cc_value;
4449 switch (instr_.RtFieldRaw()) {
4667 set_register(rt_reg, ReadH(rs + se_imm16, instr_.instr()));
4675 int32_t val = ReadW(addr, instr_.instr());
4682 set_register(rt_reg, ReadW(rs + se_imm16, instr_.instr()));
4685 set_register(rt_reg, ReadWU(rs + se_imm16, instr_.instr()));
4688 set_register(rt_reg, Read2W(rs + se_imm16, instr_.instr()));
4694 set_register(rt_reg, ReadHU(rs + se_imm16, instr_.instr()));
4702 alu_out = ReadW(addr, instr_.instr());
4714 alu_out = Read2W(addr, instr_.instr());
4726 alu_out = Read2W(addr, instr_.instr());
4736 WriteH(rs + se_imm16, static_cast<uint16_t>(rt), instr_.instr());
4743 uint64_t mem_value = ReadW(addr, instr_.instr()) & mask;
4745 WriteW(addr, static_cast<int32_t>(mem_value), instr_.instr());
4749 WriteW(rs + se_imm16, static_cast<int32_t>(rt), instr_.instr());
4752 Write2W(rs + se_imm16, rt, instr_.instr());
4758 uint64_t mem_value = ReadW(addr, instr_.instr());
4760 WriteW(addr, static_cast<int32_t>(mem_value), instr_.instr());
4768 uint64_t mem_value = Read2W(addr, instr_.instr()) & mask;
4770 Write2W(addr, mem_value, instr_.instr());
4777 uint64_t mem_value = Read2W(addr, instr_.instr());
4779 Write2W(addr, mem_value, instr_.instr());
4785 ReadW(rs + se_imm16, instr_.instr(), FLOAT_DOUBLE));
4788 set_fpu_register_double(ft_reg, ReadD(rs + se_imm16, instr_.instr()));
4793 WriteW(rs + se_imm16, alu_out_32, instr_.instr());
4797 WriteD(rs + se_imm16, get_fpu_register_double(ft_reg), instr_.instr());
4803 int32_t imm21 = instr_.Imm21Value();
4815 int32_t imm19 = instr_.Imm19Value();
4822 alu_out = Read2W(addr, instr_.instr());
4887 SimInstruction simInstr = instr_;
4929 instr_ = instr;
4930 switch (instr_.InstructionType()) {
