Lines Matching full:extract
302 /*--- Extract instruction fields --- */
305 /* Extract field from insn, given idx (zero = lsb) and field length */
308 /* Extract primary opcode, instr[31:26] */
313 /* Extract 10-bit secondary opcode, instr[10:1] */
318 /* Extract 9-bit secondary opcode, instr[9:1] */
323 /* Extract 8-bit secondary opcode, instr[8:1] */
328 /* Extract 5-bit secondary opcode, instr[5:1] */
333 /* Extract 2-bit secondary opcode, instr[1:0] */
338 /* Extract RD (destination register) field, instr[25:21] */
343 /* Extract XT (destination register) field, instr[0,25:21] */
351 /* Extract XS (store source register) field, instr[0,25:21] */
357 /* Extract RA (1st source register) field, instr[20:16] */
362 /* Extract XA (1st source register) field, instr[2,20:16] */
370 /* Extract RB (2nd source register) field, instr[15:11] */
375 /* Extract XB (2nd source register) field, instr[1,15:11] */
383 /* Extract RC (3rd source register) field, instr[10:6] */
388 /* Extract XC (3rd source register) field, instr[3,10:6] */
396 /* Extract bit 10, instr[10] */
401 /* Extract 2nd lowest bit, instr[1] */
406 /* Extract lowest bit, instr[0] */
411 /* Extract unsigned bottom half, instr[15:0] */
416 /* Extract unsigned bottom 26 bits, instr[25:0] */
421 /* Extract DM field, instr[9:8] */
426 /* Extract SHW field, instr[9:8] */
946 /* vB is a vector, extract bits starting at index to size of mask */
4199 /* extract exponents, and fractional parts so they can be compared */
12271 /* Extract the exponent and the left most digit of the mantissa
12764 /* Extract G[0:4] */
13629 /* Extract the Gfield */
15775 AltiVec Vector Extract Element Instructions
15802 case 0x60D: // vextublx, vector extract unsigned Byte Left-indexed
15813 case 0x64D: // vextuhlx, vector extract unsigned Halfword Left-indexed
15823 case 0x68D: // vextuwlx, vector extract unsigned Word Left-indexed
15833 case 0x70D: // vextubrx, vector extract unsigned Byte Right-indexed
15839 case 0x74D: // vextuhrx, vector extract unsigned Halfword Right-indexed
15845 case 0x78D: // vextuwrx, vector extract unsigned Word Right-indexed
16654 * 2. Extract the 4 single precision floats from each vector
18637 case 0x14A: // xxextractuw (VSX Vector Extract Unsigned Word)
18711 case 0x2b6: // xsxexpdp (VSX Scalar Extract Exponent Double-Precision)
18712 // xsxsigdp (VSX Scalar Extract Significand Doulbe-Precision)
19248 case 0x3B6: // xvxexpdp (VSX Vector Extract
19249 // xvxsigdp (VSX Vector Extract Significand Double-Precision)
19251 // xvxexpsp (VSX Vector Extract Exponent Single-Precision)
19252 // xvxsigsp (VSX Vector Extract Significand Single-Precision)
21486 /* Store the rm specification bits. Will extract them later when
21508 /* Store the rm specification bits. Will extract them later when
22157 // xsxexpqp (VSX Scalaar Extract Exponent Quad-Precision)
22160 // xsxsigqp (VSX Scalar Extract Significand Quad-Precision)
22431 /* create mask to extract the permute index value from vB,
24320 /* Extract the indexed byte from vA and vB using the lower 4-bits
24403 /* Extract instructions */
24404 case 0x20D: // vextractub (Vector Extract Unsigned Byte)
24425 case 0x24D: // vextractuh (Vector Extract Unsigned Halfword)
24446 case 0x28D: // vextractuw (Vector Extract Unsigned Word)
24468 case 0x2CD: // vextractd (Vector Extract Double Word)
28078 case 0x162: // dxex - Extract exponent
28414 case 0x162: // dxexq - DFP Extract exponent
29192 Extract Element instructions */
29218 /* AV Merge, Splat, Extract, Insert */
