Cross Reference: /external/valgrind/VEX/priv/host_amd64

Lines Matching defs:argL
1224          HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1);
1228          addInstr(env, mk_iMOVsd_RR(argL, hregAMD64_RDI()) );
1423          IRExpr* argL = e->Iex.Unop.arg->Iex.Binop.arg1;
1438             HReg reg      = iselIntExpr_R(env, argL);
2828          HReg argL = iselDblExpr(env, triop->arg2);
2830          addInstr(env, mk_vMOVsd_RR(argL, dst));
3365          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3368          addInstr(env, mk_vMOVsd_RR(argL, dst));
3381          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3384          addInstr(env, mk_vMOVsd_RR(argL, dst));
3400          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3403          addInstr(env, mk_vMOVsd_RR(argL, dst));
3419          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3422          addInstr(env, mk_vMOVsd_RR(argL, dst));
3561          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3585             movupd  %argL, 0(%rsi)
3588          addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL,
3613          HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3634             movupd  %argL, 0(%rsi)
3636          addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL,
3668          HReg argL = iselVecExpr(env, triop->arg2);
3671          addInstr(env, mk_vMOVsd_RR(argL, dst));
3684          HReg argL = iselVecExpr(env, triop->arg2);
3687          addInstr(env, mk_vMOVsd_RR(argL, dst));
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