Lines Matching full:ldrd
1728 void Disassembler::ldrd(Condition cond,
1738 void Disassembler::ldrd(Condition cond,
10610 // LDRD{<c>}{<q>} <Rt>, <Rt2>, <label> ; T1
10612 ldrd(CurrentCond(),
10617 ldrd(CurrentCond(),
10638 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>], #{+/-}<imm> ; T1 NOLINT(whitespace/line_length)
10639 ldrd(CurrentCond(),
10668 // LDRD{<c>}{<q>} <Rt>, <Rt2>, <label> ; T1
10670 ldrd(CurrentCond(),
10675 ldrd(CurrentCond(),
10696 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>{, #{+/-}<imm>}] ; T1 NOLINT(whitespace/line_length)
10697 ldrd(CurrentCond(),
10726 // LDRD{<c>}{<q>} <Rt>, <Rt2>, <label> ; T1
10728 ldrd(CurrentCond(),
10733 ldrd(CurrentCond(),
10754 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>{, #{+/-}<imm>}]! ; T1 NOLINT(whitespace/line_length)
10755 ldrd(CurrentCond(),
58011 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>], #{+/-}<Rm> ; A1
58012 ldrd(condition,
58205 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>, #{+/-}<Rm>] ; A1
58206 ldrd(condition,
58331 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>, #{+/-}<Rm>]! ; A1
58332 ldrd(condition,
58902 // LDRD{<c>}{<q>} <Rt>, <Rt2>, <label> ; A1
58904 ldrd(condition,
58909 ldrd(condition,
58935 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>], #{+/-}<imm_1> ; A1 NOLINT(whitespace/line_length)
58936 ldrd(condition,
58959 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>{, #{+/-}<imm_1>}] ; A1 NOLINT(whitespace/line_length)
58960 ldrd(condition,
58983 // LDRD{<c>}{<q>} <Rt>, <Rt2>, [<Rn>{, #{+/-}<imm_1>}]! ; A1 NOLINT(whitespace/line_length)
58984 ldrd(condition,
